公开(公告)号：US10743404B2

公开(公告)日：2020-08-11

申请号：US16731370

申请日：2019-12-31

Applicant: Cree, Inc.

Inventor： Qianli Mu ,  Cristian Gozzi ,  Asmita Dani

IPC: H01L23/66 ,  H05K1/02 ,  H01L23/498 ,  H05K1/03 ,  H05K1/11 ,  H05K1/18 ,  H05K1/16 ,  H01L23/13 ,  H05K1/14 ,  H05K3/42

Abstract: A semiconductor device includes a metal base, a transistor die mounted on the metal base, a lid over the transistor die, and a multilayer printed circuit board electrically connected to the transistor die. The multilayer printed circuit board comprises a first portion positioned between the lid and the metal base, a second portion positioned outside of the lid, a plurality of embedded conductive layers, an embedded dielectric layer disposed between at least two of the plurality of embedded conductive layers, and at least one embedded reactive component formed from at least one of the embedded conductive layers.

公开(公告)号：US10468399B2

公开(公告)日：2019-11-05

申请号：US14673928

申请日：2015-03-31

Applicant: Cree, Inc.

Inventor： Saurabh Goel ,  Alexander Komposch ,  Cynthia Blair ,  Cristian Gozzi

IPC: H01L23/495 ,  H01L25/00 ,  H01L23/66 ,  H01L23/538 ,  H01L23/36 ,  H01L25/065

Abstract: A multi-cavity package includes a single metal flange having first and second opposing main surfaces, a circuit board attached to the first main surface of the single metal flange, the circuit board having a plurality of openings which expose different regions of the first main surface of the single metal flange, and a plurality of semiconductor dies each of which is disposed in one of the openings in the circuit board and attached to the first main surface of the single metal flange. The circuit board includes a plurality of metal traces for electrically interconnecting the semiconductor dies to form a circuit. A corresponding method of manufacturing is also provided.

公开(公告)号：US10575394B2

公开(公告)日：2020-02-25

申请号：US16209018

申请日：2018-12-04

Applicant: Cree, Inc.

Inventor： Qianli Mu ,  Cristian Gozzi ,  Asmita Dani

IPC: H01L23/13 ,  H05K1/02 ,  H01L23/498 ,  H01L23/66 ,  H05K1/03 ,  H05K1/11 ,  H05K1/18 ,  H05K1/16 ,  H05K1/14 ,  H05K3/42

Abstract: A Doherty amplifier includes a metal baseplate having a die attach region and a peripheral region; a main amplifier and one or more peaking amplifiers, each amplifier comprising a transistor die that includes at least one RF terminal; and a multilayer circuit board having a first side attached to the peripheral region and a second side facing away from the baseplate. The circuit board includes two embedded electrically conductive layers separated from the two sides by respective composite fiber layers, and an embedded dielectric layer disposed between the embedded electrically conductive layers and having a higher dielectric constant than either of the composite fiber layers. The Doherty amplifier also includes an RF impedance matching network that is electrically connected to an RF terminal of at least one amplifier transistor die, and that comprises one or more reactive components formed from at least one of the embedded electrically conductive layers.

公开(公告)号：US20190110358A1

公开(公告)日：2019-04-11

申请号：US16209018

申请日：2018-12-04

Applicant: Cree, Inc.

Inventor： Qianli Mu ,  Cristian Gozzi ,  Asmita Dani

IPC: H05K1/02 ,  H01L23/498 ,  H01L23/66 ,  H01L23/13

Abstract: A Doherty amplifier includes a metal baseplate having a die attach region and a peripheral region; a main amplifier and one or more peaking amplifiers, each amplifier comprising a transistor die that includes at least one RF terminal; and a multilayer circuit board having a first side attached to the peripheral region and a second side facing away from the baseplate. The circuit board includes two embedded electrically conductive layers separated from the two sides by respective composite fiber layers, and an embedded dielectric layer disposed between the embedded electrically conductive layers and having a higher dielectric constant than either of the composite fiber layers. The Doherty amplifier also includes an RF impedance matching network that is electrically connected to an RF terminal of at least one amplifier transistor die, and that comprises one or more reactive components formed from at least one of the embedded electrically conductive layers.

公开(公告)号：US20200137877A1

公开(公告)日：2020-04-30

申请号：US16731370

申请日：2019-12-31

Applicant: Cree, Inc.

Inventor： Qianli Mu ,  Cristian Gozzi ,  Asmita Dani

IPC: H05K1/02 ,  H01L23/13 ,  H01L23/498 ,  H01L23/66 ,  H05K1/03 ,  H05K1/11 ,  H05K1/18 ,  H05K1/16

Abstract: A semiconductor device includes a metal base, a transistor die mounted on the metal base, a lid over the transistor die, and a multilayer printed circuit board electrically connected to the transistor die. The multilayer printed circuit board comprises a first portion positioned between the lid and the metal base, a second portion positioned outside of the lid, a plurality of embedded conductive layers, an embedded dielectric layer disposed between at least two of the plurality of embedded conductive layers, and at least one embedded reactive component formed from at least one of the embedded conductive layers.

公开(公告)号：US20200035660A1

公开(公告)日：2020-01-30

申请号：US16589624

申请日：2019-10-01

Applicant: Cree, Inc.

Inventor： Saurabh Goel ,  Alexander Komposch ,  Cynthia Blair ,  Cristian Gozzi

IPC: H01L25/00 ,  H01L23/36 ,  H01L23/538 ,  H01L23/66

Abstract: A multi-cavity package includes a single metal flange having first and second opposing main surfaces. The multi-cavity package also includes a circuit board attached to the first main surface of the single metal flange. The circuit board includes a first surface facing the single metal flange, and a second surface facing away from the first surface. The circuit board also includes a plurality of openings exposing different regions of the first main surface of the single metal flange. The circuit board also includes a lateral extension that overhangs the single metal flange. A corresponding method of manufacturing is also provided.