公开(公告)号：US11837457B2

公开(公告)日：2023-12-05

申请号：US17018721

申请日：2020-09-11

Applicant: Cree, Inc.

Inventor： Basim Noori ,  Marvin Marbell ,  Scott Sheppard ,  Kwangmo Chris Lim ,  Alexander Komposch ,  Qianli Mu

IPC: H01L23/538 ,  H01L23/498 ,  H01L23/66 ,  H01L23/00 ,  H01L25/16 ,  H01L25/00 ,  H01L29/417 ,  H01L29/423

CPC classification number: H01L23/5389 ,  H01L23/49811 ,  H01L23/5386 ,  H01L23/66 ,  H01L24/16 ,  H01L24/32 ,  H01L25/16 ,  H01L25/50 ,  H01L29/41741 ,  H01L29/4238 ,  H01L2223/6644 ,  H01L2223/6655 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2924/1033 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10344 ,  H01L2924/10346 ,  H01L2924/13064 ,  H01L2924/19105

Abstract: RF transistor amplifiers an RF transistor amplifier die having a semiconductor layer structure, an interconnect structure having first and second opposing sides, wherein the first side of the interconnect structure is adjacent a surface of the RF transistor amplifier die such that the interconnect structure and the RF transistor amplifier die are in a stacked arrangement, and one or more circuit elements on the first and/or second side of the interconnect structure.

公开(公告)号：US20210351121A1

公开(公告)日：2021-11-11

申请号：US17085433

申请日：2020-10-30

Applicant: Cree, Inc.

Inventor： Mitch Flowers ,  Erwin Cohen ,  Alexander Komposch ,  Larry Christopher Wall

IPC: H01L23/528

Abstract: A package includes a circuit that includes at least one active area and at least one secondary device area, a support configured to support the circuit, and a die attach material. The circuit being mounted on the support using the die attach material and the die attach material including at least one channel configured to allow gases generated during curing of the die attach material to be released from the die attach material.

公开(公告)号：US20210265249A1

公开(公告)日：2021-08-26

申请号：US16797290

申请日：2020-02-21

Applicant: Cree, Inc.

Inventor： Alexander Komposch ,  Simon Ward ,  Madhu Chidurala

IPC: H01L23/498 ,  H01L23/66

Abstract: A device includes: a surface mount device carrier configured to be mounted to a metal submount of a transistor package, said surface mount device carrier includes an insulating substrate includes a top surface and a bottom surface and a first pad and a second pad arranged on a top surface of said surface mount device carrier; at least one surface mount device includes a first terminal and a second terminal, said first terminal of said surface mount device mounted to said first pad and said second terminal mounted to said second pad; and at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by said insulating substrate, where at least one of the first pad and the second pad are configured as wire bond pads.

公开(公告)号：US11004808B2

公开(公告)日：2021-05-11

申请号：US15973276

申请日：2018-05-07

Applicant: Cree, Inc.

Inventor： Xikun Zhang ,  Dejiang Chang ,  Bill Agar ,  Michael Lefevre ,  Alexander Komposch

IPC: H01L23/00 ,  H01L23/66 ,  H01L23/495 ,  H01L23/498 ,  H01L25/07 ,  H01L25/00 ,  H01L29/16

Abstract: A multi-die package includes a thermally conductive flange, a first semiconductor die made of a first semiconductor material attached to the thermally conductive flange via a first die attach material, a second semiconductor die attached to the same thermally conductive flange as the first semiconductor die via a second die attach material, and leads attached to the thermally conductive flange or to an insulating member secured to the flange. The leads are configured to provide external electrical access to the first and second semiconductor dies. The second semiconductor die is made of a second semiconductor material different than the first semiconductor material. Additional multi-die package embodiments are described.

公开(公告)号：US20190051617A1

公开(公告)日：2019-02-14

申请号：US15673734

申请日：2017-08-10

Applicant: Cree, Inc.

Inventor： David Seebacher ,  Christian Schuberth ,  Peter Singerl ,  Alexander Komposch

IPC: H01L23/00 ,  H01L23/373 ,  H01L21/48

Abstract: In sonic examples, a method includes pre-stressing a flange, heating the flange to a die-attach temperature, and attaching a die to the flange at the die-attach temperature using a die-attach material. In some examples, the flange includes a metal material, the die-attach temperature may be at least two hundred degrees Celsius, and the die-attach material may include solder and/or an adhesive. In some examples, the method includes cooling the semiconductor die and metal flange to a room temperature after attaching the semiconductor die to the metal flange at the die-attach temperature using a die-attach material.

公开(公告)号：US11488923B2

公开(公告)日：2022-11-01

申请号：US16421824

申请日：2019-05-24

Applicant: Cree, Inc.

Inventor： Sung Chul Joo ,  Alexander Komposch ,  Brian William Condie ,  Benjamin Law ,  Jae Hyung Jeremiah Park

IPC: H01L23/00

Abstract: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.

公开(公告)号：US20210351113A1

公开(公告)日：2021-11-11

申请号：US16868639

申请日：2020-05-07

Applicant: Cree, Inc.

Inventor： Mitch Flowers ,  Erwin Cohen ,  Alexander Komposch

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

Abstract: A package includes an integrated circuit that includes at least one active area and at least one secondary device area, a support configured to support the integrated circuit, and a die attach material. The integrated circuit being mounted on the support using the die attach material and the die attach material including at least one channel configured to allow gases generated during curing of the die attach material to be released from the die attach material.

公开(公告)号：US20210313293A1

公开(公告)日：2021-10-07

申请号：US17018762

申请日：2020-09-11

Applicant: Cree, Inc.

Inventor： Basim Noori ,  Marvin Marbell ,  Scott Sheppard ,  Kwangmo Chris Lim ,  Alexander Komposch ,  Qianli Mu

IPC: H01L23/00 ,  H03F3/195 ,  H01L23/047 ,  H01L23/31 ,  H01L23/66

Abstract: A transistor amplifier includes a semiconductor layer structure comprising first and second major surfaces and a plurality of unit cell transistors on the first major surface that are electrically connected in parallel, each unit cell transistor comprising a gate finger coupled to a gate manifold, a drain finger coupled to a drain manifold, and a source finger. The semiconductor layer structure is free of a via to the source fingers on the second major surface.

公开(公告)号：US20210313282A1

公开(公告)日：2021-10-07

申请号：US16906610

申请日：2020-06-19

Applicant: Cree, Inc.

Inventor： Basim Noori ,  Marvin Marbell ,  Scott Sheppard ,  Kwangmo Chris Lim ,  Alexander Komposch ,  Qianli Mu

IPC: H01L23/66 ,  H03F1/08 ,  H03F3/195

Abstract: A transistor amplifier includes a group III-nitride based amplifier die including a gate terminal, a drain terminal, and a source terminal on a first surface of the amplifier die and an interconnect structure electrically bonded to the gate terminal, drain terminal and source terminal of the amplifier die on the first surface of the amplifier die and electrically bonded to an input path and output path of the transistor amplifier.

公开(公告)号：US20210057370A1

公开(公告)日：2021-02-25

申请号：US16548241

申请日：2019-08-22

Applicant: Cree, Inc.

Inventor： Alexander Komposch ,  Kevin Schneider ,  Scott Sheppard

IPC: H01L23/00 ,  H01L23/48 ,  H01L21/768

Abstract: A semiconductor device package includes a package substrate having a die attach region, a silicon carbide (SiC) substrate having a first surface including a semiconductor device layer thereon and a second surface that is opposite the first surface, and a die attach metal stack. The die attach metal stack includes a sputtered die attach material layer that attaches the second surface of the SiC substrate to the die attach region of the package substrate, where the sputtered die attach material layer comprises a void percent of about 15% or less. The sputtered die attach material layer may be formed using a sputter gas including at least one of krypton (Kr), xenon (Xe), or radon (Rn). The die attach metal stack may further include a metal interlayer that prevent contacts with a first barrier metal layer during a phase transition of the die attach material layer.