公开(公告)号：US09412790B1

公开(公告)日：2016-08-09

申请号：US13705082

申请日：2012-12-04

申请人： Crossbar, Inc.

发明人： Mark Harold Clark ,  Natividad Vasquez ,  Steven Maxwell

IPC分类号： H01L21/332 ,  H01L27/24 ,  H01L45/00

CPC分类号： H01L27/2481 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1675

摘要： A method for forming a resistive switching device. The method includes providing a substrate having a surface region and forming a first dielectric material overlying the surface region. A first wiring structure is formed overlying the first dielectric material. The method forms one or more first structure comprising a junction material overlying the first wiring structure. A second structure comprising a stack of material is formed overlying the first structure. The second structure includes a resistive switching material, an active conductive material overlying the resistive switching material, and a second wiring material overlying the active conductive material. The second structure is configured such that the resistive switching material is free from a coincident vertical sidewall region with the junction material.

摘要翻译： 一种形成电阻式开关装置的方法。 该方法包括提供具有表面区域并形成覆盖在表面区域上的第一电介质材料的衬底。 第一布线结构形成在第一介电材料上。 该方法形成包括覆盖在第一布线结构上的连接材料的一个或多个第一结构。 包括第一结构的层叠材料的第二结构被形成。 第二结构包括电阻开关材料，覆盖电阻开关材料的有源导电材料和覆盖有源导电材料的第二布线材料。 第二结构被配置为使得电阻式开关材料与具有连接材料的重合的垂直侧壁区域无关。

公开(公告)号：US09166163B2

公开(公告)日：2015-10-20

申请号：US14027045

申请日：2013-09-13

申请人： Crossbar, Inc.

发明人： Harry Yue Gee ,  Mark Harold Clark ,  Steven Patrick Maxwell ,  Sung Hyun Jo ,  Natividad Vasquez, Jr.

IPC分类号： G11C11/00 ,  H01L45/00

CPC分类号： H01L45/085 ,  H01L27/2436 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/1608 ,  H01L45/1633

摘要： Provision of fabrication, construction, and/or assembly of a two-terminal memory device is described herein. The two-terminal memory device can include an active region with a silicon bearing layer, an interface layer, and an active metal layer. The interface layer can created comprising a non-stoichimetric sub-oxide that can be a combination of multiple silicon and/or silicon oxide layers with an aggregate chemical formula of SiOX, where X can be a non-integer greater than zero and less than 2. The sub-oxide can be created in a variety of ways, including various techniques related to growing the sub-oxide, depositing the sub-oxide, or transforming an extant film into the sub-oxide.

摘要翻译： 本文描述了提供双端存储器件的制造，构造和/或组装。 双端存储器件可以包括具有硅轴承层，界面层和活性金属层的有源区。 可以创建界面层，其包括可以是具有聚集化学式SiO x的多个硅和/或氧化硅层的组合的非重质亚氧化物，其中X可以是大于零且小于2的非整数 亚氧化物可以以各种方式产生，包括与生长亚氧化物，沉积亚氧化物或将现有薄膜转化为亚氧化物相关的各种技术。

公开(公告)号：US09601690B1

公开(公告)日：2017-03-21

申请号：US14887050

申请日：2015-10-19

申请人： Crossbar, Inc.

发明人： Harry Yue Gee ,  Mark Harold Clark ,  Steven Patrick Maxwell ,  Sung Hyun Jo ,  Natividad Vasquez, Jr.

IPC分类号： G11C11/00 ,  H01L45/00 ,  H01L27/24

CPC分类号： H01L45/085 ,  H01L27/2436 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/1608 ,  H01L45/1633

摘要： Provision of fabrication, construction, and/or assembly of a two-terminal memory device is described herein. The two-terminal memory device can include an active region with a silicon bearing layer, an interface layer, and an active metal layer. The interface layer can created comprising a non-stoichiometric sub-oxide that can be a combination of multiple silicon and/or silicon oxide layers with an aggregate chemical formula of SiOX, where X can be a non-integer greater than zero and less than 2. The sub-oxide can be created in a variety of ways, including various techniques related to growing the sub-oxide, depositing the sub-oxide, or transforming an extant film into the sub-oxide.

公开(公告)号：US09269897B2

公开(公告)日：2016-02-23

申请号：US14310113

申请日：2014-06-20

申请人： Crossbar, Inc.

发明人： Mark Harold Clark

IPC分类号： H01L47/00 ,  H01L45/00 ,  H01L27/24

CPC分类号： H01L45/1253 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1675

摘要： A method of forming a resistive device includes forming a first wiring layer overlying a first dielectric on top of a substrate, forming a junction material, patterning the first wiring layer and junction material to expose a portion of the first dielectric, forming a second dielectric over the patterned first wiring layer, forming an opening in the second dielectric to expose a portion of the junction material, forming a resistive switching material over the portion of the junction material in the opening, the resistive switching material having an intrinsic semiconductor characteristic, forming a conductive material over the resistive switching material, etching the conductive material and the resistive switching material to expose respective sidewalls of the resistive switching material and the conductive material, and the second dielectric, and forming a second wiring layer over the conductive material in contact with the respective sidewalls and the second dielectric.

摘要翻译： 一种形成电阻器件的方法包括：形成覆盖在衬底顶部上的第一电介质的第一布线层，形成接合材料，图案化第一布线层和接合材料以暴露第一电介质的一部分，形成第二电介质 所述图案化的第一布线层在所述第二电介质中形成开口以暴露所述连接材料的一部分，在所述开口中的所述结材料的所述部分上形成电阻性切换材料，所述电阻开关材料具有本征半导体特性， 导电材料，蚀刻导电材料和电阻开关材料以暴露电阻开关材料和导电材料和第二电介质的相应侧壁，并且在与导电材料接触的导电材料上形成第二布线层 各个侧壁和第二电介质。

公开(公告)号：US10192927B1

公开(公告)日：2019-01-29

申请号：US15206056

申请日：2016-07-08

申请人： Crossbar, Inc.

发明人： Mark Harold Clark ,  Natividad Vasquez ,  Steven Maxwell

IPC分类号： H01L29/06 ,  H01L47/00 ,  H01L29/76 ,  H01L27/24 ,  H01L45/00 ,  H01L23/528

摘要： A method for forming a resistive switching device. The method includes providing a substrate having a surface region and forming a first dielectric material overlying the surface region. A first wiring structure is formed overlying the first dielectric material. The method forms one or more first structure comprising a junction material overlying the first wiring structure. A second structure comprising a stack of material is formed overlying the first structure. The second structure includes a resistive switching material, an active conductive material overlying the resistive switching material, and a second wiring material overlying the active conductive material. The second structure is configured such that the resistive switching material is free from a coincident vertical sidewall region with the junction material.

公开(公告)号：US09583701B1

公开(公告)日：2017-02-28

申请号：US14213953

申请日：2014-03-14

申请人： Crossbar, Inc.

发明人： Harry Yue Gee ,  Steven Patrick Maxwell ,  Natividad Vasquez, Jr. ,  Mark Harold Clark

IPC分类号： H01L45/00

CPC分类号： H01L45/1266 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/148 ,  H01L45/1616 ,  H01L45/165 ,  H01L45/1675

摘要： A memory device comprising a doped conductive polycrystalline layer having an electrically resistive portion, is described herein. By way of example, ion implantation to a subset of the conductive polycrystalline layer can degrade and modify the polycrystalline layer, forming the electrically resistive portion. The electrically resistive portion can include resistive switching properties facilitating digital information storage. Parametric control of the ion implantation can facilitate control over corresponding resistive switching properties of the resistive portion. For example, a projected range or depth of the ion implantation can be controlled, allowing for preferential placement of atoms in the resistive portion, and fine-tuning of a forming voltage of the memory device. As another example, dose and number of atoms implanted, type of atoms or ions that are implanted, the conductive polycrystalline material used, and so forth, can facilitate control over switching characteristics of the memory device.

摘要翻译： 本文描述了包括具有电阻部分的掺杂导电多晶层的存储器件。 作为示例，离子注入导电多晶层的子集可以降解和修饰多晶层，从而形成电阻部分。 电阻部分可以包括促进数字信息存储的电阻切换特性。 离子注入的参数控制可以有助于控制电阻部分的对应的电阻开关特性。 例如，可以控制离子注入的投影范围或深度，允许优先放置电阻部分中的原子，以及微调存储器件的形成电压。 作为另一示例，注入的原子的剂量和数量，注入的原子或离子的类型，使用的导电多晶材料等等可以有助于对存储器件的开关特性的控制。