公开(公告)号：US08101518B2

公开(公告)日：2012-01-24

申请号：US12136885

申请日：2008-06-11

申请人： Cyril Cabral, Jr. ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

发明人： Cyril Cabral, Jr. ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L29/665

摘要： The present invention provides a method for forming a self-aligned Ni alloy silicide contact. The method of the present invention begins by first depositing a conductive Ni alloy with Pt and optionally at least one of the following metals Pd, Rh, Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W or Re over an entire semiconductor structure which includes at least one gate stack region. An oxygen diffusion barrier comprising, for example, Ti, TiN or W is deposited over the structure to prevent oxidation of the metals. An annealing step is then employed to cause formation of a NiSi, PtSi contact in regions in which the metals are in contact with silicon. The metal that is in direct contact with insulating material such as SiO2 and Si3N4 is not converted into a metal alloy silicide contact during the annealing step A. selective etching step is then performed to remove unreacted metal from the sidewalls of the spacers and trench isolation regions.

摘要翻译： 本发明提供一种形成自对准Ni合金硅化物接触的方法。 本发明的方法首先首先用Pt和任选的以下金属Pd，Rh，Ti，V，Cr，Zr，Nb，Mo，Hf，Ta，W或Re中的至少一种沉积导电Ni合金， 整个半导体结构，其包括至少一个栅极堆叠区域。 包含例如Ti，TiN或W的氧扩散阻挡层沉积在结构上以防止金属的氧化。 然后使用退火步骤在金属与硅接触的区域中形成NiSi，PtSi接触。 在退火步骤A期间，与绝缘材料（例如SiO 2和Si 3 N 4）直接接触的金属不会转化为金属合金硅化物接触。然后进行选择性蚀刻步骤以从间隔物和沟槽隔离区域的侧壁去除未反应的金属 。

公开(公告)号：US07544610B2

公开(公告)日：2009-06-09

申请号：US10935497

申请日：2004-09-07

申请人： Cyril Cabral, Jr. ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

发明人： Cyril Cabral, Jr. ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

IPC分类号： H01L21/477 ,  H01L21/441

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L29/665

摘要： The present invention provides a method for forming a self-aligned Ni alloy silicide contact. The method of the present invention begins by first depositing a conductive Ni alloy with Pt and optionally at least one of the following metals Pd, Rh, Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W or Re over an entire semiconductor structure which includes at least one gate stack region. An oxygen diffusion barrier comprising, for example, Ti, TiN or W is deposited over the structure to prevent oxidation of the metals. An annealing step is then employed to cause formation of a NiSi, PtSi contact in regions in which the metals are in contact with silicon. The metal that is in direct contact with insulating material such as SiO2 and Si3N4 is not converted into a metal alloy silicide contact during the annealing step. A selective etching step is then performed to remove unreacted metal from the sidewalls of the spacers and trench isolation regions.

摘要翻译： 本发明提供一种形成自对准Ni合金硅化物接触的方法。 本发明的方法首先首先用Pt和任选的以下金属Pd，Rh，Ti，V，Cr，Zr，Nb，Mo，Hf，Ta，W或Re中的至少一种沉积导电Ni合金， 整个半导体结构，其包括至少一个栅极堆叠区域。 包含例如Ti，TiN或W的氧扩散阻挡层沉积在结构上以防止金属的氧化。 然后使用退火步骤在金属与硅接触的区域中形成NiSi，PtSi接触。 在绝缘材料如SiO 2和Si 3 N 4中直接接触的金属在退火步骤期间不会转化为金属合金硅化物接触。 然后执行选择性蚀刻步骤以从间隔物和沟槽隔离区域的侧壁去除未反应的金属。

公开(公告)号：US20080274611A1

公开(公告)日：2008-11-06

申请号：US12136885

申请日：2008-06-11

申请人： Cyril Cabral ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

发明人： Cyril Cabral ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L29/665

摘要： The present invention provides a method for forming a self-aligned Ni alloy silicide contact. The method of the present invention begins by first depositing a conductive Ni alloy with Pt and optionally at least one of the following metals Pd, Rh, Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W or Re over an entire semiconductor structure which includes at least one gate stack region. An oxygen diffusion barrier comprising, for example, Ti, TiN or W is deposited over the structure to prevent oxidation of the metals. An annealing step is then employed to cause formation of a NiSi, PtSi contact in regions in which the metals are in contact with silicon. The metal that is in direct contact with insulating material such as SiO2 and Si3N4 is not converted into a metal alloy silicide contact during the annealing step A selective etching step is then performed to remove unreacted metal from the sidewalls of the spacers and trench isolation regions.

摘要翻译： 本发明提供一种形成自对准Ni合金硅化物接触的方法。 本发明的方法首先首先用Pt和任选的以下金属Pd，Rh，Ti，V，Cr，Zr，Nb，Mo，Hf，Ta，W或Re中的至少一种沉积导电Ni合金， 整个半导体结构，其包括至少一个栅极堆叠区域。 包含例如Ti，TiN或W的氧扩散阻挡层沉积在结构上以防止金属的氧化。 然后使用退火步骤在金属与硅接触的区域中形成NiSi，PtSi接触。 与诸如SiO 2和Si 3 N 4 N之类的绝缘材料直接接触的金属在金属合金硅化物接触期间不会转化为金属合金硅化物接触 然后执行退火步骤A选择性蚀刻步骤以从间隔物和沟槽隔离区域的侧壁去除未反应的金属。

公开(公告)号：US07759208B1

公开(公告)日：2010-07-20

申请号：US12412406

申请日：2009-03-27

申请人： Asa Frye ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Donald R. Wall

发明人： Asa Frye ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Donald R. Wall

IPC分类号： H01L21/36

CPC分类号： H01L21/265 ,  H01L21/28518 ,  H01L29/665 ,  H01L29/78

摘要： Embodiments of the present invention provide a method that cools a substrate to a temperature below 10° C. and then implants ions into the substrate while the temperature of the substrate is below 10° C. The implanting causes damage to a first depth of the substrate to create an amorphized region in the substrate. The method forms a layer of metal on the substrate and heats the substrate until the metal reacts with the substrate and forms a silicide region within the amorphized region of the substrate. The depth of the silicide region is at least as deep as the first depth.

摘要翻译： 本发明的实施方案提供了一种将基材冷却至低于10℃的温度，然后在基材的温度低于10℃时将离子注入基底中的方法。植入会导致基底的第一深度的损伤 以在基底中产生非晶化区域。 该方法在衬底上形成金属层并加热衬底，直到金属与衬底反应并在衬底的非晶化区域内形成硅化物区域。 硅化物区域的深度至少与第一深度一样深。

公开(公告)号：US08741773B2

公开(公告)日：2014-06-03

申请号：US12684144

申请日：2010-01-08

申请人： Asa Frye ,  Andrew Simon

发明人： Asa Frye ,  Andrew Simon

IPC分类号： H01L29/78

CPC分类号： H01L21/28518 ,  H01L29/665

摘要： Embodiments of the invention provide a method of forming nickel-silicide. The method may include depositing first and second metal layers over at least one of a gate, a source, and a drain region of a field-effect-transistor (FET) through a physical vapor deposition (PVD) process, wherein the first metal layer is deposited using a first nickel target material containing platinum (Pt), and the second metal layer is deposited on top of the first metal layer using a second nickel target material containing no or less platinum than that in the first nickel target material; and annealing the first and second metal layers covering the FET to form a platinum-containing nickel-silicide layer at a top surface of the gate, source, and drain regions.

摘要翻译： 本发明的实施例提供一种形成硅化镍的方法。 该方法可以包括通过物理气相沉积（PVD）工艺在场效应晶体管（FET）的栅极，源极和漏极区域中的至少一个上沉积第一和第二金属层，其中第一金属层 使用含有铂（Pt）的第一镍靶材料沉积，并且使用不比第一镍靶材料中不含铂的第二镍靶材料将第二金属层沉积在第一金属层的顶部上; 以及退火覆盖所述FET的所述第一和第二金属层，以在所述栅极，源极和漏极区域的顶表面处形成含铂的硅化镍层。

公开(公告)号：US08637925B2

公开(公告)日：2014-01-28

申请号：US13408246

申请日：2012-02-29

申请人： Asa Frye ,  Andrew Simon

发明人： Asa Frye ,  Andrew Simon

IPC分类号： H01L29/76

CPC分类号： H01L21/28518 ,  H01L29/665

摘要： Embodiments of the invention provide a method of forming nickel-silicide. The method may include depositing first and second metal layers over at least one of a gate, a source, and a drain region of a field-effect-transistor (FET) through a physical vapor deposition (PVD) process, wherein the first metal layer is deposited using a first nickel target material containing platinum (Pt), and the second metal layer is deposited on top of the first metal layer using a second nickel target material containing no or less platinum than that in the first nickel target material; and annealing the first and second metal layers covering the FET to form a platinum-containing nickel-silicide layer at a top surface of the gate, source, and drain regions.

公开(公告)号：US20120153359A1

公开(公告)日：2012-06-21

申请号：US13408246

申请日：2012-02-29

申请人： Asa Frye ,  Andrew Simon

发明人： Asa Frye ,  Andrew Simon

IPC分类号： H01L29/772

CPC分类号： H01L21/28518 ,  H01L29/665

摘要： Embodiments of the invention provide a method of forming nickel-silicide. The method may include depositing first and second metal layers over at least one of a gate, a source, and a drain region of a field-effect-transistor (FET) through a physical vapor deposition (PVD) process, wherein the first metal layer is deposited using a first nickel target material containing platinum (Pt), and the second metal layer is deposited on top of the first metal layer using a second nickel target material containing no or less platinum than that in the first nickel target material; and annealing the first and second metal layers covering the FET to form a platinum-containing nickel-silicide layer at a top surface of the gate, source, and drain regions.

摘要翻译： 本发明的实施例提供一种形成硅化镍的方法。 该方法可以包括通过物理气相沉积（PVD）工艺在场效应晶体管（FET）的栅极，源极和漏极区域中的至少一个上沉积第一和第二金属层，其中第一金属层 使用含有铂（Pt）的第一镍靶材料沉积，并且使用不比第一镍靶材料中不含铂的第二镍靶材料将第二金属层沉积在第一金属层的顶部上; 以及退火覆盖所述FET的所述第一和第二金属层，以在所述栅极，源极和漏极区域的顶表面处形成含铂的硅化镍层。

公开(公告)号：US20110169058A1

公开(公告)日：2011-07-14

申请号：US12684144

申请日：2010-01-08

申请人： Asa Frye ,  Andrew Simon

发明人： Asa Frye ,  Andrew Simon

IPC分类号： H01L29/78 ,  H01L21/3205

CPC分类号： H01L21/28518 ,  H01L29/665

摘要： Embodiments of the invention provide a method of forming nickel-silicide. The method may include depositing first and second metal layers over at least one of a gate, a source, and a drain region of a field-effect-transistor (FET) through a physical vapor deposition (PVD) process, wherein the first metal layer is deposited using a first nickel target material containing platinum (Pt), and the second metal layer is deposited on top of the first metal layer using a second nickel target material containing no or less platinum than that in the first nickel target material; and annealing the first and second metal layers covering the FET to form a platinum-containing nickel-silicide layer at a top surface of the gate, source, and drain regions.

摘要翻译： 本发明的实施例提供一种形成硅化镍的方法。 该方法可以包括通过物理气相沉积（PVD）工艺在场效应晶体管（FET）的栅极，源极和漏极区域中的至少一个上沉积第一和第二金属层，其中第一金属层 使用含有铂（Pt）的第一镍靶材料沉积，并且使用不比第一镍靶材料中不含铂的第二镍靶材料将第二金属层沉积在第一金属层的顶部上; 以及退火覆盖所述FET的所述第一和第二金属层，以在所述栅极，源极和漏极区域的顶表面处形成含铂的硅化镍层。