公开(公告)号：US08101518B2

公开(公告)日：2012-01-24

申请号：US12136885

申请日：2008-06-11

申请人： Cyril Cabral, Jr. ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

发明人： Cyril Cabral, Jr. ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L29/665

摘要： The present invention provides a method for forming a self-aligned Ni alloy silicide contact. The method of the present invention begins by first depositing a conductive Ni alloy with Pt and optionally at least one of the following metals Pd, Rh, Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W or Re over an entire semiconductor structure which includes at least one gate stack region. An oxygen diffusion barrier comprising, for example, Ti, TiN or W is deposited over the structure to prevent oxidation of the metals. An annealing step is then employed to cause formation of a NiSi, PtSi contact in regions in which the metals are in contact with silicon. The metal that is in direct contact with insulating material such as SiO2 and Si3N4 is not converted into a metal alloy silicide contact during the annealing step A. selective etching step is then performed to remove unreacted metal from the sidewalls of the spacers and trench isolation regions.

摘要翻译： 本发明提供一种形成自对准Ni合金硅化物接触的方法。 本发明的方法首先首先用Pt和任选的以下金属Pd，Rh，Ti，V，Cr，Zr，Nb，Mo，Hf，Ta，W或Re中的至少一种沉积导电Ni合金， 整个半导体结构，其包括至少一个栅极堆叠区域。 包含例如Ti，TiN或W的氧扩散阻挡层沉积在结构上以防止金属的氧化。 然后使用退火步骤在金属与硅接触的区域中形成NiSi，PtSi接触。 在退火步骤A期间，与绝缘材料（例如SiO 2和Si 3 N 4）直接接触的金属不会转化为金属合金硅化物接触。然后进行选择性蚀刻步骤以从间隔物和沟槽隔离区域的侧壁去除未反应的金属 。

公开(公告)号：US07544610B2

公开(公告)日：2009-06-09

申请号：US10935497

申请日：2004-09-07

申请人： Cyril Cabral, Jr. ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

发明人： Cyril Cabral, Jr. ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

IPC分类号： H01L21/477 ,  H01L21/441

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L29/665

摘要： The present invention provides a method for forming a self-aligned Ni alloy silicide contact. The method of the present invention begins by first depositing a conductive Ni alloy with Pt and optionally at least one of the following metals Pd, Rh, Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W or Re over an entire semiconductor structure which includes at least one gate stack region. An oxygen diffusion barrier comprising, for example, Ti, TiN or W is deposited over the structure to prevent oxidation of the metals. An annealing step is then employed to cause formation of a NiSi, PtSi contact in regions in which the metals are in contact with silicon. The metal that is in direct contact with insulating material such as SiO2 and Si3N4 is not converted into a metal alloy silicide contact during the annealing step. A selective etching step is then performed to remove unreacted metal from the sidewalls of the spacers and trench isolation regions.

摘要翻译： 本发明提供一种形成自对准Ni合金硅化物接触的方法。 本发明的方法首先首先用Pt和任选的以下金属Pd，Rh，Ti，V，Cr，Zr，Nb，Mo，Hf，Ta，W或Re中的至少一种沉积导电Ni合金， 整个半导体结构，其包括至少一个栅极堆叠区域。 包含例如Ti，TiN或W的氧扩散阻挡层沉积在结构上以防止金属的氧化。 然后使用退火步骤在金属与硅接触的区域中形成NiSi，PtSi接触。 在绝缘材料如SiO 2和Si 3 N 4中直接接触的金属在退火步骤期间不会转化为金属合金硅化物接触。 然后执行选择性蚀刻步骤以从间隔物和沟槽隔离区域的侧壁去除未反应的金属。

公开(公告)号：US20080274611A1

公开(公告)日：2008-11-06

申请号：US12136885

申请日：2008-06-11

申请人： Cyril Cabral ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

发明人： Cyril Cabral ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L29/665

摘要： The present invention provides a method for forming a self-aligned Ni alloy silicide contact. The method of the present invention begins by first depositing a conductive Ni alloy with Pt and optionally at least one of the following metals Pd, Rh, Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W or Re over an entire semiconductor structure which includes at least one gate stack region. An oxygen diffusion barrier comprising, for example, Ti, TiN or W is deposited over the structure to prevent oxidation of the metals. An annealing step is then employed to cause formation of a NiSi, PtSi contact in regions in which the metals are in contact with silicon. The metal that is in direct contact with insulating material such as SiO2 and Si3N4 is not converted into a metal alloy silicide contact during the annealing step A selective etching step is then performed to remove unreacted metal from the sidewalls of the spacers and trench isolation regions.

摘要翻译： 本发明提供一种形成自对准Ni合金硅化物接触的方法。 本发明的方法首先首先用Pt和任选的以下金属Pd，Rh，Ti，V，Cr，Zr，Nb，Mo，Hf，Ta，W或Re中的至少一种沉积导电Ni合金， 整个半导体结构，其包括至少一个栅极堆叠区域。 包含例如Ti，TiN或W的氧扩散阻挡层沉积在结构上以防止金属的氧化。 然后使用退火步骤在金属与硅接触的区域中形成NiSi，PtSi接触。 与诸如SiO 2和Si 3 N 4 N之类的绝缘材料直接接触的金属在金属合金硅化物接触期间不会转化为金属合金硅化物接触 然后执行退火步骤A选择性蚀刻步骤以从间隔物和沟槽隔离区域的侧壁去除未反应的金属。

公开(公告)号：US20100051474A1

公开(公告)日：2010-03-04

申请号：US12548893

申请日：2009-08-27

申请人： Panayotis C. Andricacos ,  Caliopi Andricacos ,  Donald F. Canaperi ,  Emanuel I. Cooper ,  John M. Cotte ,  Hariklia Deligianni ,  Laertis Economikos ,  Daniel C. Edelstein ,  Silvia Franz ,  Balasubramanian Pranatharthiharan ,  Mahadevaiyer Krishnan ,  Andrew P. Mansson ,  Erick G. Walton ,  Alan C. West

发明人： Panayotis C. Andricacos ,  Caliopi Andricacos ,  Donald F. Canaperi ,  Emanuel I. Cooper ,  John M. Cotte ,  Hariklia Deligianni ,  Laertis Economikos ,  Daniel C. Edelstein ,  Silvia Franz ,  Balasubramanian Pranatharthiharan ,  Mahadevaiyer Krishnan ,  Andrew P. Mansson ,  Erick G. Walton ,  Alan C. West

IPC分类号： B23H5/06

CPC分类号： C25F3/02 ,  B23H5/08 ,  C09G1/04 ,  H01L21/32125

摘要： Methods and compositions for electro-chemical-mechanical polishing (e-CMP) of silicon chip interconnect materials, such as copper, are provided. The methods include the use of compositions according to the invention in combination with pads having various configurations.

摘要翻译： 提供了诸如铜之类的硅芯片互连材料的电化学机械抛光（e-CMP）的方法和组合物。 所述方法包括使用根据本发明的组合物与具有各种构型的垫组合。