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    Performing forming processes on resistive memory
    3.
    发明授权
    Performing forming processes on resistive memory 有权
    在电阻式存储器上执行形成过程

    公开(公告)号：US08730708B2

    公开(公告)日：2014-05-20

    申请号：US13286375

    申请日：2011-11-01

    申请人： Xiaonan Chen

    发明人： Xiaonan Chen

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0069 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C2013/0073 ,  G11C2013/0083 ,  G11C2013/0092 ,  Y10T29/49002

    摘要： The present disclosure includes apparatuses and methods for performing forming processes on resistive memory. A number of embodiments include applying a formation signal to the storage element of a resistive memory cell, wherein the formation signal includes a first portion having a first polarity and a first amplitude, a second portion having a second polarity and a second amplitude, wherein the second polarity is opposite the first polarity and the second amplitude is smaller than the first amplitude, and a third portion having the first polarity and a third amplitude that is smaller than the first amplitude.

    摘要翻译： 本公开包括用于在电阻性存储器上执行形成处理的装置和方法。 许多实施例包括将形成信号施加到电阻式存储单元的存储元件，其中形成信号包括具有第一极性和第一幅度的第一部分，具有第二极性和第二幅度的第二部分，其中， 第二极性与第一极性相反，第二振幅小于第一振幅，第三极部分具有第一极性，第三振幅小于第一振幅。

    Variable resistance memory programming
    4.
    发明授权
    Variable resistance memory programming 有权
    可变电阻存储器编程

    公开(公告)号：US08446758B2

    公开(公告)日：2013-05-21

    申请号：US12967592

    申请日：2010-12-14

    申请人： Xiaonan Chen

    发明人： Xiaonan Chen

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0069 ,  G11C7/04 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0064 ,  G11C2013/0092

    摘要： Some embodiments include a device having memory elements and methods of storing information into the memory elements. Such methods can include increasing a temperature of a portion of a memory element for a time interval during an operation to change a resistance state of the memory element. After the time interval, the methods can include decreasing the temperature of the portion of the memory element. Decreasing the temperature can be performed using a signal having a first negative slope and a second negative slope. Other embodiments are described.

    摘要翻译： 一些实施例包括具有存储元件的设备和将信息存储到存储器元件中的方法。 这样的方法可以包括在操作期间增加存储元件的一部分时间间隔的温度以改变存储元件的电阻状态。 在时间间隔之后，方法可以包括降低存储元件部分的温度。 可以使用具有第一负斜率和第二负斜率的信号来执行降低温度。 描述其他实施例。

    Systems, and devices, and methods for programming a resistive memory cell
    5.
    发明授权
    Systems, and devices, and methods for programming a resistive memory cell 有权
    系统和设备以及用于编程电阻式存储单元的方法

    公开(公告)号：US08787095B2

    公开(公告)日：2014-07-22

    申请号：US13407007

    申请日：2012-02-28

    申请人： Xiaonan Chen

    发明人： Xiaonan Chen

    IPC分类号： G11C7/10

    CPC分类号： G11C13/0069 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2013/0092

    摘要： Embodiments disclosed herein may relate to programming a memory cell with a programming pulse that includes a quenching period. The quenching period includes an initial portion and a subsequent portion, with the subsequent portion different than the initial portion. During the initial portion, the amplitude of the programming pulse may be reduced to a first target amplitude level, and during the subsequent portion, the amplitude of the programming pulse may be further reduced to a second target amplitude level.

    摘要翻译： 本文公开的实施例可以涉及使用包括淬灭周期的编程脉冲编程存储器单元。 淬火周期包括初始部分和后续部分，后续部分与初始部分不同。 在初始部分期间，编程脉冲的幅度可以减小到第一目标幅度电平，并且在随后的部分期间，编程脉冲的幅度可以进一步减小到第二目标幅度电平。

    MULTIMODE INTERFERENCE COUPLER FOR USE WITH SLOT PHOTONIC CRYSTAL WAVEGUIDES
    7.
    发明申请
    MULTIMODE INTERFERENCE COUPLER FOR USE WITH SLOT PHOTONIC CRYSTAL WAVEGUIDES 有权
    多功能干涉仪与SLOT PHOTONIC CRYSTAL WAVEGUIDES一起使用

    公开(公告)号：US20100226608A1

    公开(公告)日：2010-09-09

    申请号：US12550186

    申请日：2009-08-28

    申请人： Xiaonan Chen ,  Ray T. Chen

    发明人： Xiaonan Chen ,  Ray T. Chen

    IPC分类号： G02B6/26

    CPC分类号： G02B6/1225 ,  B82Y20/00 ,  G02B6/29344

    摘要： The present invention provides an optical apparatus having a multimode interference coupler configured to optically couple a strip waveguide to a slot photonic crystal waveguide. The multimode interference coupler has a coupling efficiency to the slot photonic crystal waveguide greater than or equal to 90%, a width that is approximately equal to a defect width of the slot photonic crystal waveguide, a length that is equal to or less than 1.5 μm, and interfaces with the slot photonic crystal waveguide at an edge of a period that gives a termination parameter of approximately zero. The optical apparatus may also include an insulation gap disposed between the multimode interference coupler and the slot photonic crystal waveguide, wherein the length of the multimode interference coupler is reduced by approximately one half of a width of the insulation gap.

    摘要翻译： 本发明提供了一种具有多模干涉耦合器的光学装置，其被配置为将条形波导光学耦合到时隙光子晶体波导。 多模干扰耦合器对槽隙光子晶体波导具有大于或等于90％的耦合效率，大约等于槽光子晶体波导的缺陷宽度的宽度，等于或小于1.5μm的长度 并且在给出约为零的终止参数的周期的边缘处与时隙光子晶体波导接口。 光学装置还可以包括设置在多模干涉耦合器和狭缝光子晶体波导之间的绝缘间隙，其中多模干涉耦合器的长度减小绝缘间隙的宽度的大约一半。

    PERFORMING FORMING PROCESSES ON RESISTIVE MEMORY
    9.
    发明申请
    PERFORMING FORMING PROCESSES ON RESISTIVE MEMORY 有权
    在电阻记忆体上形成成形工艺

    公开(公告)号：US20130107605A1

    公开(公告)日：2013-05-02

    申请号：US13286375

    申请日：2011-11-01

    申请人： Xiaonan Chen

    发明人： Xiaonan Chen

    IPC分类号： G11C11/00 ,  H05K13/00

    CPC分类号： G11C13/0069 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C2013/0073 ,  G11C2013/0083 ,  G11C2013/0092 ,  Y10T29/49002

    摘要： The present disclosure includes apparatuses and methods for performing forming processes on resistive memory. A number of embodiments include applying a formation signal to the storage element of a resistive memory cell, wherein the formation signal includes a first portion having a first polarity and a first amplitude, a second portion having a second polarity and a second amplitude, wherein the second polarity is opposite the first polarity and the second amplitude is smaller than the first amplitude, and a third portion having the first polarity and a third amplitude that is smaller than the first amplitude.

    摘要翻译： 本公开包括用于在电阻性存储器上执行形成处理的装置和方法。 许多实施例包括将形成信号施加到电阻式存储单元的存储元件，其中形成信号包括具有第一极性和第一幅度的第一部分，具有第二极性和第二幅度的第二部分，其中， 第二极性与第一极性相反，第二振幅小于第一振幅，第三极部分具有第一极性，第三振幅小于第一振幅。