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1.发明授权公开(公告)号：US09996646B2
公开(公告)日：2018-06-12
申请号：US15087502
申请日：2016-03-31
申请人： DELL PRODUCTS, LP
发明人： Bhyrav M. Mutnury , Arun R. Chada
CPC分类号： G06F17/5031 , G06F17/5036 , G06F17/5077 , G06F17/5081 , H05K3/0005
摘要： A method includes providing, on a printed circuit board, a first circuit trace having a first unit cell length and a second circuit trace having a second unit cell length, determining a time delay associated with the first unit cell length and the second unit cell length, estimating a floquet frequency associated with the time delay, where the floquet frequency is determined as f floquet = 1 2 t delay , where ffloquet is the floquet frequency, and tdelay is the time delay, and comparing the estimated floquet frequency with a first interface frequency associated with the first trace.
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2.发明授权公开(公告)号：US09935682B1
公开(公告)日：2018-04-03
申请号：US15388634
申请日：2016-12-22
申请人： DELL PRODUCTS, LP
发明人： Arun R. Chada , Bhyrav M. Mutnury , Jiayi He
CPC分类号： H04B3/04 , H04B14/023 , H04L25/03121 , H04L25/03878
摘要： A serial data channel includes a transmitter that encodes data using a PAM-4 where each symbol is represented by one of four signal levels comprising two balanced pairs of differential signal levels, and a de-emphasis circuit. The circuit determines that a symbol represents as a first instance of a first signal state, determines that a next symbol represents a second instance of the first state, and determines that a third symbol is represented as a second state. The circuit determines that the second state is of a same balanced pair as the first state and, in response, provides a de-emphasis to the second symbol. The circuit determines that the second state is of a different balanced pair as the first state and, in response, provides the de-emphasis and a correction factor to the second symbol.
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公开(公告)号：US09930771B2
公开(公告)日：2018-03-27
申请号：US14971193
申请日：2015-12-16
申请人： Dell Products, LP
发明人： Bhyrav M. Mutnury , Arun R. Chada
CPC分类号： H05K1/0228 , H01P3/02 , H01P3/026 , H01P11/003 , H05K2201/09263 , H05K2201/09672
摘要： A trace route including a first signal route to couple a first signal transmitter to a first signal receiver. The first signal route including a first signal route section coupled to the transmitter and configured in a first zig-zag pattern, the first zig-zag pattern including a first unit cell having a first unit cell length, and a second signal route section connected to the first signal route section and coupled to the receiver, and configured in a second zig-zag pattern, the second zig-zag pattern comprising a second unit cell having a second unit cell length, the first unit cell length is less than the second unit cell length.
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4.发明申请公开(公告)号：US20190289710A1
公开(公告)日：2019-09-19
申请号：US15923494
申请日：2018-03-16
申请人： DELL PRODUCTS, LP
摘要： A printed circuit board includes a differential signal via pairs to route differential signal between layers of the printed circuit board. A first differential signal via pair is oriented in a first orientation and a second differential signal via pair is oriented perpendicular to the first orientation. The second differential signal via pair is located such that a midpoint of a first line segment drawn between centers of first and second vias of the second differential signal pair intersects a first ray drawn from a center of a first via of the first differential signal via pair through a center of a second via of the first differential signal via pair. Further, the second differential signal via pair is located such that the midpoint of the first line segment is at a characteristic via-to-via pitch distance for the printed circuit board from the center of the second via of the first differential signal via pair.
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公开(公告)号：US10298420B1
公开(公告)日：2019-05-21
申请号：US15926525
申请日：2018-03-20
申请人： DELL PRODUCTS, LP
发明人： Arun R. Chada , Han Deng , Bhyrav M. Mutnury
摘要： A high-speed serial data interface includes a transmitter and a receiver. The transmitter includes a feed-forward equalization (FFE) module. The FFE module has a main tap and at least one secondary tap. In a first mode, a sum of absolute values of a main tap compensation value and a secondary tap compensation value of each one of the at least one secondary tap is equal to one. In a second mode, the main tap compensation value has a unity gain equal to one, and each secondary tap compensation value is greater than or equal to the secondary tap compensation value in the first mode divided by the main tap compensation value in the first mode.
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6.发明申请公开(公告)号：US20180091189A1
公开(公告)日：2018-03-29
申请号：US15274579
申请日：2016-09-23
申请人： DELL PRODUCTS, LP
发明人： Arun R. Chada , Bhyrav M. Mutnury , Jiayi He
CPC分类号： H04B3/04 , H04L25/03343 , H04L25/03878 , H04L25/4917
摘要： A method includes receiving a serial data stream at a transmitter of a serial channel, encoding the serial data stream using a quaternary pulse amplitude modulation (PAM-4) scheme into a stream of 2-bit symbols, wherein a particular symbol is represented as a signal at one of four signal levels provided for a unit interval of time, determining that a first symbol of the encoded serial data stream is represented as a highest state of the PAM-4 scheme, and, in response, providing a first output signal on an output of the transmitter, wherein the first output signal includes a first portion at a first voltage level associated with the highest state for a first half of a first unit interval of time associated with the first symbol, followed by a second portion at a second voltage level associated with a de-emphasized highest state of the PAM-4 scheme for a second half of the first unit interval of time.
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7.发明授权公开(公告)号：US09954576B2
公开(公告)日：2018-04-24
申请号：US15274579
申请日：2016-09-23
申请人： DELL PRODUCTS, LP
发明人： Arun R. Chada , Bhyrav M. Mutnury , Jiayi He
CPC分类号： H04B3/04 , H04L25/03343 , H04L25/03878 , H04L25/4917
摘要： A method includes receiving a serial data stream at a transmitter of a serial channel, encoding the serial data stream using a quaternary pulse amplitude modulation (PAM-4) scheme into a stream of 2-bit symbols, wherein a particular symbol is represented as a signal at one of four signal levels provided for a unit interval of time, determining that a first symbol of the encoded serial data stream is represented as a highest state of the PAM-4 scheme, and, in response, providing a first output signal on an output of the transmitter, wherein the first output signal includes a first portion at a first voltage level associated with the highest state for a first half of a first unit interval of time associated with the first symbol, followed by a second portion at a second voltage level associated with a de-emphasized highest state of the PAM-4 scheme for a second half of the first unit interval of time.
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8.发明申请公开(公告)号：US20160217238A1
公开(公告)日：2016-07-28
申请号：US15087502
申请日：2016-03-31
申请人： DELL PRODUCTS, LP
发明人： Bhyrav M. Mutnury , Arun R. Chada
IPC分类号： G06F17/50
CPC分类号： G06F17/5031 , G06F17/5036 , G06F17/5077 , G06F17/5081 , H05K3/0005
摘要： A method includes providing, on a printed circuit board, a first circuit trace having a first unit cell length and a second circuit trace having a second unit cell length, determining a time delay associated with the first unit cell length and the second unit cell length, estimating a floquet frequency associated with the time delay, where the floquet frequency is determined as f floquet = 1 2 t delay , where ffloquet is the floquet frequency, and tdelay is the time delay, and comparing the estimated floquet frequency with a first interface frequency associated with the first trace.
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9.发明申请System and Method of Determining High Speed Resonance due to Coupling From Broadside Layers 有权确定由宽边层耦合引起的高速共振的系统和方法公开(公告)号：US20160085902A1
公开(公告)日：2016-03-24
申请号：US14494128
申请日：2014-09-23
申请人： Dell Products, LP
发明人： Bhyrav M. Mutnury , Arun R. Chada
CPC分类号： G06F17/5031 , G06F17/5036 , G06F17/5077 , G06F17/5081 , H05K3/0005
摘要： A method includes providing, on a printed circuit board, a first circuit trace having a first unit cell length and a second circuit trace having a second unit cell length, determining a time delay associated with the first unit cell length and the second unit cell length, estimating a floquet frequency associated with the time delay, where the floquet frequency is determined as f floquet = 1 2 t delay , where ffloquet is the floquet frequency, and tdelay is the time delay, and comparing the estimated floquet frequency with a first interface frequency associated with the first trace.
摘要翻译： 一种方法包括在印刷电路板上提供具有第一单位单元长度的第一电路迹线和具有第二单位单元长度的第二电路迹线，确定与第一单位单元长度和第二单位单元长度相关联的时间延迟 ，估计与时间延迟相关联的花粉频率，其中花粉频率被确定为f floquet = 1 2 t t延迟，其中ffloquet是花粉频率，tdelay是时间延迟，并且将估计的花粉频率与第一 界面频率与第一个跟踪相关联。
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10.发明授权公开(公告)号：US11178751B2
公开(公告)日：2021-11-16
申请号：US15923494
申请日：2018-03-16
申请人： DELL PRODUCTS, LP
摘要： A printed circuit board includes a differential signal via pairs to route differential signal between layers of the printed circuit board. A first differential signal via pair is oriented in a first orientation and a second differential signal via pair is oriented perpendicular to the first orientation. The second differential signal via pair is located such that a midpoint of a first line segment drawn between centers of first and second vias of the second differential signal pair intersects a first ray drawn from a center of a first via of the first differential signal via pair through a center of a second via of the first differential signal via pair. Further, the second differential signal via pair is located such that the midpoint of the first line segment is at a characteristic via-to-via pitch distance for the printed circuit board from the center of the second via of the first differential signal via pair.
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