公开(公告)号：US20180062512A1

公开(公告)日：2018-03-01

申请号：US15247290

申请日：2016-08-25

申请人： DELL PRODUCTS, LP

发明人： Guangyong Zhu ,  Shiguo Luo ,  Kejiu Zhang ,  Lei Wang

IPC分类号： H02M3/158 ,  H02M1/38

CPC分类号： H02M1/38 ,  H02M3/1588

摘要： To prevent cross-conduction when switching switches in switching circuitry for voltage regulation, a dead time may be maintained between turning off a switch and turning on a switch. The dead time may be determined based on a switching transition voltage and a voltage of the switching circuitry and may be implemented using a timer.

公开(公告)号：US20210287730A1

公开(公告)日：2021-09-16

申请号：US16815191

申请日：2020-03-11

申请人： DELL PRODUCTS, LP

发明人： Stuart A. Berke ,  Jordan Chin ,  Ralph H. Johnson ,  Shiguo Luo

IPC分类号： G11C11/4076 ,  G11C11/4074 ,  G11C5/04 ,  G11C5/14 ,  H03L7/081 ,  H02M3/156 ,  G06F1/324 ,  G06F13/42

摘要： An memory subsystem of an information handling system includes a memory module and a controller. The memory module includes a Registering Clock Driver (RCD) configured to receive a clock signal. The RCD includes a delay setting and a clock delay circuit to provide a selectable delayed clock signal based upon the delay setting. The memory module further includes a power management integrated circuit (PMIC) with a plurality of switching regulators. The PMIC receives the delayed clock signal and clocks the switching regulators based upon the delayed clock signal. The controller sets the first delay setting.

公开(公告)号：US09935550B2

公开(公告)日：2018-04-03

申请号：US15247290

申请日：2016-08-25

申请人： DELL PRODUCTS, LP

发明人： Guangyong Zhu ,  Shiguo Luo ,  Kejiu Zhang ,  Lei Wang

IPC分类号： H02M3/158 ,  H02M1/38

CPC分类号： H02M1/38 ,  H02M3/1588

摘要： To prevent cross-conduction when switching switches in switching circuitry for voltage regulation, a dead time may be maintained between turning off a switch and turning on a switch. The dead time may be determined based on a switching transition voltage and a voltage of the switching circuitry and may be implemented using a timer.

公开(公告)号：US09606598B2

公开(公告)日：2017-03-28

申请号：US14729558

申请日：2015-06-03

申请人： Dell Products, LP

发明人： Shiguo Luo ,  Ralph H. Johnson, III ,  John E. Jenne

IPC分类号： G06F1/26 ,  G06F1/32 ,  G06F17/30

CPC分类号： G06F17/30424 ,  G06F1/3275 ,  G06F1/3296 ,  Y02D10/14 ,  Y02D10/172

摘要： A voltage regulator may be tuned to reduce consumption of electrical power. An installed configuration of a dual inline memory module is used to load test the voltage regulator. Results of the load test may then reveal tuning parameters that make the voltage regulator more efficient.

公开(公告)号：US10594216B2

公开(公告)日：2020-03-17

申请号：US15934298

申请日：2018-03-23

申请人： DELL PRODUCTS, LP

发明人： Hang Li ,  Shiguo Luo ,  Mehran Mirjafari

IPC分类号： H02M3/158 ,  H02M1/32 ,  H02M1/00

摘要： An information handling system includes a voltage regulator control circuit having a programming resistor input pin for receiving an input from a programming resistor and an ammeter input for receiving a current value. A power source provides power to a load circuit coupled to the power source via a non-remote-sensing power connection. In accordance with at least one embodiment, the voltage regulator control circuit assures a reliable input to an overvoltage protection circuit of the voltage regulator control circuit regardless of states of connections of the load circuit to the power source.

公开(公告)号：US20160357234A1

公开(公告)日：2016-12-08

申请号：US14729558

申请日：2015-06-03

申请人： Dell Products, LP

发明人： Shiguo Luo ,  Ralph H. Johnson, III ,  John E. Jenne

IPC分类号： G06F1/26 ,  G06F17/30 ,  G06F1/32

CPC分类号： G06F17/30424 ,  G06F1/3275 ,  G06F1/3296 ,  Y02D10/14 ,  Y02D10/172

摘要： A voltage regulator may be tuned to reduce consumption of electrical power. An installed configuration of a dual inline memory module is used to load test the voltage regulator. Results of the load test may then reveal tuning parameters that make the voltage regulator more efficient.

摘要翻译： 可以调节电压调节器以减少电力消耗。 使用双列直插式存储器模块的安装配置来对电压调节器进行负载测试。 负载测试的结果可能会显示使调压器更有效的调谐参数。

公开(公告)号：US08791680B2

公开(公告)日：2014-07-29

申请号：US13716823

申请日：2012-12-17

申请人： Dell Products, LP

发明人： Shiguo Luo ,  Colin Lambert

IPC分类号： G05F1/00

CPC分类号： G05F1/10 ,  H02M3/1584 ,  H02M2001/0032 ,  Y02B70/16

摘要： A voltage regulator includes a first phase power stage, a second phase power stage, and a controller. The first phase power stage includes a zero cross detection circuit configured to measure a current level for the first phase power stage, and to cause a diode emulation state in the first phase power stage when the current level is substantially equal to zero. The second phase power stage is in communication with the zero cross detection circuit, and configured to enter the diode emulation state in response to receiving a signal from the zero cross detection circuit. The controller is coupled to the first phase power stage and to the second phase power stage. The controller is configured to measure an output current of the voltage regulator and to activate the second phase power stage when the output current is above a first threshold current level.

摘要翻译： 电压调节器包括第一相功率级，第二相功率级和控制器。 第一相功率级包括被配置为测量第一相功率级的电流电平的零交叉检测电路，并且当电流电平基本上等于零时在第一相功率级中引起二极管仿真状态。 第二相功率级与零交叉检测电路通信，并且被配置为响应于接收到来自过零检测电路的信号而进入二极管仿真状态。 控制器耦合到第一相功率级和第二相功率级。 控制器被配置为测量电压调节器的输出电流并且当输出电流高于第一阈值电流电平时激活第二相功率级。

公开(公告)号：US20130099766A1

公开(公告)日：2013-04-25

申请号：US13716823

申请日：2012-12-17

申请人： Dell Products, LP

发明人： Shiguo Luo ,  Colin Lambert

IPC分类号： G05F1/10

CPC分类号： G05F1/10 ,  H02M3/1584 ,  H02M2001/0032 ,  Y02B70/16

摘要： A voltage regulator includes a first phase power stage, a second phase power stage, and a controller. The first phase power stage includes a zero cross detection circuit configured to measure a current level for the first phase power stage, and to cause a diode emulation state in the first phase power stage when the current level is substantially equal to zero. The second phase power stage is in communication with the zero cross detection circuit, and configured to enter the diode emulation state in response to receiving a signal from the zero cross detection circuit. The controller is coupled to the first phase power stage and to the second phase power stage. The controller is configured to measure an output current of the voltage regulator and to activate the second phase power stage when the output current is above a first threshold current level.

摘要翻译： 电压调节器包括第一相功率级，第二相功率级和控制器。 第一相功率级包括被配置为测量第一相功率级的电流电平的零交叉检测电路，并且当电流电平基本上等于零时在第一相功率级中引起二极管仿真状态。 第二相功率级与零交叉检测电路通信，并且被配置为响应于接收到来自过零检测电路的信号而进入二极管仿真状态。 控制器耦合到第一相功率级和第二相功率级。 控制器被配置为测量电压调节器的输出电流并且当输出电流高于第一阈值电流电平时激活第二相功率级。

公开(公告)号：US11444533B2

公开(公告)日：2022-09-13

申请号：US16989232

申请日：2020-08-10

申请人： DELL PRODUCTS, LP

发明人： Feng-Yu Wu ,  Guangyong Zhu ,  Shiguo Luo

IPC分类号： H02M3/158 ,  H02M1/00

摘要： A power stage includes a power converter having high- and low-side switches, a driver circuit that drives the switching power converter based upon a PWM signal, and a current sensing circuit that detects a low-side current level on the low-side switch, and provides a current level signal that includes the low-side current level. The power stage turns on the low-side switch at a first time, and estimates a first low-side current level at the first time. In estimating the first low-side current level, the power stage detects a second low-side current level at a second time while the low-side switch is turned on, the second time being after the first time, and detects a third low-side current level at a third time while the low-side switch is turned on, wherein the third time is after the second time. The first low-side current level is estimated based upon the second and third low-side current levels.

公开(公告)号：US11222687B2

公开(公告)日：2022-01-11

申请号：US16815191

申请日：2020-03-11

申请人： DELL PRODUCTS, LP

发明人： Stuart A. Berke ,  Jordan Chin ,  Ralph H. Johnson ,  Shiguo Luo

IPC分类号： G11C11/4076 ,  G11C11/4074 ,  G11C5/04 ,  G11C5/14 ,  H02M3/156 ,  G06F1/324 ,  G06F13/42 ,  H03L7/081

摘要： An memory subsystem of an information handling system includes a memory module and a controller. The memory module includes a Registering Clock Driver (RCD) configured to receive a clock signal. The RCD includes a delay setting and a clock delay circuit to provide a selectable delayed clock signal based upon the delay setting. The memory module further includes a power management integrated circuit (PMIC) with a plurality of switching regulators. The PMIC receives the delayed clock signal and clocks the switching regulators based upon the delayed clock signal. The controller sets the first delay setting.