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    DYNAMIC ADDRESS TRANSLATION WITH ACCESS CONTROL
    2.
    发明申请
    DYNAMIC ADDRESS TRANSLATION WITH ACCESS CONTROL 有权
    动态地址翻译与访问控制

    公开(公告)号：US20090182974A1

    公开(公告)日：2009-07-16

    申请号：US11972682

    申请日：2008-01-11

    申请人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles E. Webb

    发明人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles E. Webb

    IPC分类号： G06F12/10

    CPC分类号： G06F12/1475 ,  G06F12/1036 ,  G06F12/109

    摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. Based on the origin address, a segment table entry is obtained which contains a format control field and an access validity field. If the format control and access validity are enabled, the segment table entry further contains an access control and fetch protection fields, and a segment-frame absolute address. Store operations to the block of data are permitted only if the access control field matches a program access key provided by either a Program Status Word or an operand of a program instruction being executed. Fetch operations from the desired block of data are permitted only if the program access key associated with the virtual address is equal to the segment access control field.

    摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和翻译表的层次结构的转换表的初始起始地址。 基于原始地址，获得包含格式控制字段和访问有效性字段的段表条目。 如果启用格式控制和访问有效性，则段表条目还包含访问控制和提取保护字段以及段帧绝对地址。 仅当访问控制字段与由程序状态字或正在执行的程序指令的操作数提供的程序访问键匹配时，才允许对数据块进行存储操作。 只有当与虚拟地址相关联的程序访问密钥等于段访问控制字段时，才允许从所需数据块获取操作。

    Dynamic address translation with DAT protection
    3.
    发明授权
    Dynamic address translation with DAT protection 有权
    动态地址转换与DAT保护

    公开(公告)号：US08019964B2

    公开(公告)日：2011-09-13

    申请号：US11972715

    申请日：2008-01-11

    申请人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

    发明人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

    IPC分类号： G06F12/16

    CPC分类号： G06F12/1009 ,  G06F12/145 ,  G06F2212/651 ,  G06F2212/652

    摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of any one of a region first table, a region second table, a region third table, or a segment table are obtained. Based on the obtained initial origin address, a segment table entry is obtained which contains a format control and DAT protection fields. If the format control field is enabled, obtaining from the translation table entry a segment-frame absolute address of a large block of data in main storage. The segment-frame absolute address is combined with a page index portion and a byte index portion of the virtual address to form a translated address of the desired block of data. If the DAT protection field is not enabled, fetches and stores are permitted to the desired block of data addressed by the translated virtual address.

    摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和区域第一表，区域秒表，区域第三表或段表中的任何一个的初始起始地址。 基于获得的初始起始地址，获得包含格式控制和DAT保护字段的段表条目。 如果格式控制字段被使能，则从转换表条目获得主存储器中的大块数据的段帧绝对地址。 分段帧绝对地址与虚拟地址的页索引部分和字节索引部分组合，以形成所需数据块的转换地址。 如果DAT保护字段未被使能，则获取和存储被允许被转换的虚拟地址寻址的所需数据块。

    DYNAMIC ADDRESS TRANSLATION WITH FETCH PROTECTION
    4.
    发明申请
    DYNAMIC ADDRESS TRANSLATION WITH FETCH PROTECTION 有权
    具有保护功能的动态地址转换

    公开(公告)号：US20090182971A1

    公开(公告)日：2009-07-16

    申请号：US11972688

    申请日：2008-01-11

    申请人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

    发明人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

    IPC分类号： G06F12/10

    CPC分类号： G06F12/1027 ,  G06F9/30047 ,  G06F12/0215 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/145 ,  G06F2212/1052 ,  G06F2212/654 ,  G06F2212/656 ,  G06F2212/68

    摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated is first obtained and an initial origin address of a translation table of the hierarchy of translation tables is obtained. Based on the obtained initial origin, a segment table entry is obtained. The segment table entry is configured to contain a format control and access validity fields. If the format control and access validity fields are enabled, the segment table entry further contains an access control field, a fetch protection field, and a segment-frame absolute address. Store operations are permitted only if the access control field matches a program access key provided by any one of a Program Status Word or an operand of a program instruction being executed. Fetch operations are permitted if the program access key associated with the virtual address is equal to the segment access control field.

    摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，首先获得要被翻译的虚拟地址，并且获得翻译表层级的翻译表的初始起始地址。 基于获得的初始来源，获得段表条目。 段表项被配置为包含格式控制和访问有效性字段。 如果启用格式控制和访问有效性字段，则段表条目还包含访问控制字段，提取保护字段和段帧绝对地址。 仅当访问控制字段与程序状态字或正在执行的程序指令的操作数提供的程序访问键匹配时，才允许存储操作。 如果与虚拟地址相关联的程序访问密钥等于段访问控制字段，则允许获取操作。

    Dynamic address translation with fetch protection
    5.
    发明授权
    Dynamic address translation with fetch protection 有权
    动态地址转换带保护

    公开(公告)号：US08677098B2

    公开(公告)日：2014-03-18

    申请号：US11972688

    申请日：2008-01-11

    申请人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

    发明人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

    IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

    CPC分类号： G06F12/1027 ,  G06F9/30047 ,  G06F12/0215 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/145 ,  G06F2212/1052 ,  G06F2212/654 ,  G06F2212/656 ,  G06F2212/68

    摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated is first obtained and an initial origin address of a translation table of the hierarchy of translation tables is obtained. Based on the obtained initial origin, a segment table entry is obtained. The segment table entry is configured to contain a format control and access validity fields. If the format control and access validity fields are enabled, the segment table entry further contains an access control field, a fetch protection field, and a segment-frame absolute address. Store operations are permitted only if the access control field matches a program access key provided by any one of a Program Status Word or an operand of a program instruction being executed. Fetch operations are permitted if the program access key associated with the virtual address is equal to the segment access control field.

    摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，首先获得要被翻译的虚拟地址，并且获得翻译表层级的翻译表的初始起始地址。 基于获得的初始来源，获得段表条目。 段表项被配置为包含格式控制和访问有效性字段。 如果启用格式控制和访问有效性字段，则段表条目还包含访问控制字段，提取保护字段和段帧绝对地址。 仅当访问控制字段与程序状态字或正在执行的程序指令的操作数提供的程序访问键匹配时，才允许存储操作。 如果与虚拟地址相关联的程序访问密钥等于段访问控制字段，则允许获取操作。

    DYNAMIC ADDRESS TRANSLATION WITH DAT PROTECTION
    6.
    发明申请
    DYNAMIC ADDRESS TRANSLATION WITH DAT PROTECTION 有权
    动态地址翻译与DAT保护

    公开(公告)号：US20090187732A1

    公开(公告)日：2009-07-23

    申请号：US11972715

    申请日：2008-01-11

    申请人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

    发明人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

    IPC分类号： G06F12/10

    CPC分类号： G06F12/1009 ,  G06F12/145 ,  G06F2212/651 ,  G06F2212/652

    摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of any one of a region first table, a region second table, a region third table, or a segment table are obtained. Based on the obtained initial origin address, a segment table entry is obtained which contains a format control and DAT protection fields. If the format control field is enabled, obtaining from the translation table entry a segment-frame absolute address of a large block of data in main storage. The segment-frame absolute address is combined with a page index portion and a byte index portion of the virtual address to form a translated address of the desired block of data. If the DAT protection field is not enabled, fetches and stores are permitted to the desired block of data addressed by the translated virtual address.

    摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和区域第一表，区域秒表，区域第三表或段表中的任何一个的初始起始地址。 基于获得的初始起始地址，获得包含格式控制和DAT保护字段的段表条目。 如果格式控制字段被使能，则从转换表条目获得主存储器中的大块数据的段帧绝对地址。 分段帧绝对地址与虚拟地址的页索引部分和字节索引部分组合，以形成所需数据块的转换地址。 如果DAT保护字段未被使能，则获取和存储被允许被转换的虚拟地址寻址的所需数据块。

    DYNAMIC ADDRESS TRANSLATION WITH FRAME MANAGEMENT
    7.
    发明申请
    DYNAMIC ADDRESS TRANSLATION WITH FRAME MANAGEMENT 有权
    动态地址翻译与框架管理

    公开(公告)号：US20090187724A1

    公开(公告)日：2009-07-23

    申请号：US11972725

    申请日：2008-01-11

    申请人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Timothy J. Slegel ,  Gustav E. Sittmann

    发明人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Timothy J. Slegel ,  Gustav E. Sittmann

    IPC分类号： G06F12/00

    CPC分类号： G06F12/1475 ,  G06F9/3004 ,  G06F9/30047 ,  G06F9/30145 ,  G06F12/10

    摘要： What is disclosed is a set key and clear frame management function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained which identifies a first and second general register. Obtained from the first general register is a frame size field indicating whether a storage frame is one of a small block or a large block of data. Obtained from the second general register is an operand address of a storage frame upon which the instruction is to be performed. If the storage frame is a small block, the instruction is performed only on the small block. If the indicated storage frame is a large block of data, an operand address of an initial first block of data within the large block of data is obtained from the second general register. The frame management instruction is performed on all blocks starting from the initial first block.

    摘要翻译： 公开的是针对计算机系统的机器结构定义的集合关键和清晰的帧管理功能。 在一个实施例中，获得识别第一和第二通用寄存器的机器指令。 从第一通用寄存器获得的是指示存储帧是小块还是大块数据的帧大小字段。 从第二通用寄存器获得的是要执行指令的存储帧的操作数地址。 如果存储帧是小块，则仅在小块上执行指令。 如果指示的存储帧是大数据块，则从第二通用寄存器获得大数据块内的初始第一数据块的操作数地址。 在从初始第一块开始的所有块上执行帧管理指令。

    Perform frame management function instruction for clearing blocks of main storage
    8.
    发明授权
    Perform frame management function instruction for clearing blocks of main storage 有权
    执行清理主存储块的帧管理功能指令

    公开(公告)号：US08335906B2

    公开(公告)日：2012-12-18

    申请号：US11972718

    申请日：2008-01-11

    申请人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Timothy J. Slegel ,  Gustav E. Sittmann

    发明人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Timothy J. Slegel ,  Gustav E. Sittmann

    IPC分类号： G06F12/00

    CPC分类号： G06F12/1036 ,  G06F9/30043 ,  G06F9/30145

    摘要： What is disclosed is a frame management function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained containing an opcode for a frame management instruction identifying a first and second general register. Clear frame information is obtained from the first general register having a frame size field indicating whether a storage frame is a small or large block of data. The second general register contains an operand address of a storage frame. If the storage frame is a small block, all bytes of the small block of data are set to zero. If the storage frame is a large block of data, an operand address of an initial first block of data within the large block is obtained from the second general register. All data of all blocks within the large block are cleared starting from the initial first block.

    摘要翻译： 公开的是针对计算机系统的机器结构定义的帧管理功能。 在一个实施例中，获得包含识别第一和第二通用寄存器的帧管理指令的操作码的机器指令。 从具有指示存储帧是小数据块还是大数据块的帧大小字段的第一通用寄存器获得清除帧信息。 第二个通用寄存器包含存储帧的操作数地址。 如果存储帧是小块，则小块数据的所有字节都被设置为零。 如果存储帧是大数据块，则从第二通用寄存器获得大块内的初始第一数据块的操作数地址。 大块内的所有块的所有数据从初始第一块开始清零。

    Perform frame management function instruction for setting storage keys and clearing blocks of main storage
    10.
    发明授权
    Perform frame management function instruction for setting storage keys and clearing blocks of main storage 有权
    执行用于设置存储键和清除主存储块的帧管理功能指令

    公开(公告)号：US08417916B2

    公开(公告)日：2013-04-09

    申请号：US11972725

    申请日：2008-01-11

    申请人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Timothy J. Slegel ,  Gustav E. Sittmann

    发明人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Timothy J. Slegel ,  Gustav E. Sittmann

    IPC分类号： G06F12/08

    CPC分类号： G06F12/1475 ,  G06F9/3004 ,  G06F9/30047 ,  G06F9/30145 ,  G06F12/10

    摘要： What is disclosed is a set key and clear frame management function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained which identifies a first and second general register. Obtained from the first general register is a frame size field indicating whether a storage frame is one of a small block or a large block of data. Obtained from the second general register is an operand address of a storage frame upon which the instruction is to be performed. If the storage frame is a small block, the instruction is performed only on the small block. If the indicated storage frame is a large block of data, an operand address of an initial first block of data within the large block of data is obtained from the second general register. The frame management instruction is performed on all blocks starting from the initial first block.

    摘要翻译： 公开的是针对计算机系统的机器结构定义的集合关键和清晰的帧管理功能。 在一个实施例中，获得识别第一和第二通用寄存器的机器指令。 从第一通用寄存器获得的是指示存储帧是小块还是大块数据的帧大小字段。 从第二通用寄存器获得的是要执行指令的存储帧的操作数地址。 如果存储帧是小块，则仅在小块上执行指令。 如果指示的存储帧是大数据块，则从第二通用寄存器获得大数据块内的初始第一数据块的操作数地址。 在从初始第一块开始的所有块上执行帧管理指令。