SYSTEM AND METHOD FOR MANAGING HOLDOVER

    公开(公告)号:US20170214516A1

    公开(公告)日:2017-07-27

    申请号:US15007967

    申请日:2016-01-27

    摘要: A system for managing holdover. The system may include a local oscillator device. The system may include a phase locked loop (PLL) device coupled to the local oscillator device and a reference clock source. The PLL device may obtain a reference clock signal from the reference clock source to produce an extracted clock signal. The system may include a drift monitoring device coupled to the local oscillator device and the PLL device. The drift monitoring device may determine an amount of oscillator drift within the local oscillator device using the extracted clock signal and an oscillator signal from the local oscillator device. The system may include a drift compensation device coupled to the drift monitoring device and the PLL device. The drift compensation device may transmit a drift compensation signal to the PLL device based on the amount of oscillator drift.

    SIDE PLANE
    4.
    发明申请
    SIDE PLANE 审中-公开

    公开(公告)号:US20180081137A1

    公开(公告)日:2018-03-22

    申请号:US15267393

    申请日:2016-09-16

    IPC分类号: G02B6/44 H01R13/22 H05K7/14

    摘要: A system includes a first blade including a first side of the first blade, a second side of the first blade, a front of the first blade, and a back of the first blade. The system further includes a second blade including a first side of the second blade, a second side of the second blade, a front of the second blade, and a back of the second blade. The system further includes a first side plane including a first physical communication channel configured to communicatively connect the first blade to the second blade via the first side of the first blade and the first side of the second blade.

    System and method for managing holdover

    公开(公告)号:US09843439B2

    公开(公告)日:2017-12-12

    申请号:US15007967

    申请日:2016-01-27

    摘要: A system for managing holdover. The system may include a local oscillator device. The system may include a phase locked loop (PLL) device coupled to the local oscillator device and a reference clock source. The PLL device may obtain a reference clock signal from the reference clock source to produce an extracted clock signal. The system may include a drift monitoring device coupled to the local oscillator device and the PLL device. The drift monitoring device may determine an amount of oscillator drift within the local oscillator device using the extracted clock signal and an oscillator signal from the local oscillator device. The system may include a drift compensation device coupled to the drift monitoring device and the PLL device. The drift compensation device may transmit a drift compensation signal to the PLL device based on the amount of oscillator drift.