公开(公告)号：US20060054591A1

公开(公告)日：2006-03-16

申请号：US10940917

申请日：2004-09-14

申请人： David Bernard ,  John Krawczyk ,  Christopher Money ,  Andrew McNees ,  Girish Patil ,  Karthik Vaideeswaran ,  Richard Warner

发明人： David Bernard ,  John Krawczyk ,  Christopher Money ,  Andrew McNees ,  Girish Patil ,  Karthik Vaideeswaran ,  Richard Warner

IPC分类号： G01D15/00

CPC分类号： B41J2/1603 ,  B41J2/14129 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1642 ,  B41J2/1645 ,  B41J2/1646

摘要： A micro-fluid ejection assembly and method therefor. The micro-fluid ejection assembly includes a silicon substrate having a fluid supply slot therein. The fluid supply slot is formed by an etch process conducted on a substrate using, a first etch mask circumscribing the fluid supply slot, and a second etch mask applied over a functional layer on the substrate.

摘要翻译： 微流体喷射组件及其方法。 微流体喷射组件包括其中具有流体供应槽的硅衬底。 流体供应槽由在衬底上进行的蚀刻工艺形成，使用限定流体供应槽的第一蚀刻掩模和施加在衬底上的功能层上的第二蚀刻掩模。

公开(公告)号：US20060077221A1

公开(公告)日：2006-04-13

申请号：US11281090

申请日：2005-11-17

申请人： Karthik Vaideeswaran ,  Andrew McNees ,  John Krawczyk ,  James Mrvos ,  Cory Hammond ,  Mark Doerre ,  Jason Vanderpool ,  Girish Patil ,  Christopher Money ,  Gary Williams ,  Richard Warner

发明人： Karthik Vaideeswaran ,  Andrew McNees ,  John Krawczyk ,  James Mrvos ,  Cory Hammond ,  Mark Doerre ,  Jason Vanderpool ,  Girish Patil ,  Christopher Money ,  Gary Williams ,  Richard Warner

IPC分类号： B41J2/015

CPC分类号： B41J2/1632 ,  B41J2/14145 ,  B41J2/1603 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1645 ,  B41J2/1646

摘要： A method for improving fluidic flow for a microfluidic device having a through hole or slot therein. The method includes the steps of forming one or more openings through at least part of a thickness of a substrate from a first surface to an opposite second surface using a reactive ion etching process whereby an etch stop layer is applied to side wall surfaces in the one or more openings during alternating etching and passivating steps as the openings are etched through at least a portion of the substrate. Substantially all of the etch stop layer coating is removed from the side wall surfaces by treating the side wall surfaces using a method selected from chemical treatment and mechanical treatment, whereby a surface energy of the treated side wall surfaces is increased relative to a surface energy of the side wall surfaces containing the etch stop layer coating.

摘要翻译： 一种用于改善其中具有通孔或槽的微流体装置的流体流动的方法。 该方法包括以下步骤：使用反应离子蚀刻工艺从基板的第一表面至相对的第二表面形成穿过衬底的至少一部分厚度的一个或多个开口，由此将蚀刻停止层施加到一个侧壁表面 或者在交替蚀刻和钝化步骤期间，当开口被蚀刻通过衬底的至少一部分时，可以有更多的开口。 通过使用选自化学处理和机械处理的方法处理侧壁表面，从侧壁表面去除基本上所有的蚀刻停止层涂层，由此所处理的侧壁表面的表面能相对于 所述侧壁表面包含所述蚀刻停止层涂层。

公开(公告)号：US20050093912A1

公开(公告)日：2005-05-05

申请号：US10701225

申请日：2003-11-04

申请人： Karthik Vaideeswaran ,  Andrew McNees ,  John Krawczyk ,  James Mrvos ,  Cory Hammond ,  Mark Doerre ,  Jason Vanderpool ,  Girish Patil ,  Christopher Money ,  Gary Williams ,  Richard Warner

发明人： Karthik Vaideeswaran ,  Andrew McNees ,  John Krawczyk ,  James Mrvos ,  Cory Hammond ,  Mark Doerre ,  Jason Vanderpool ,  Girish Patil ,  Christopher Money ,  Gary Williams ,  Richard Warner

IPC分类号： B41J2/14 ,  B41J2/16 ,  B41J2/015

CPC分类号： B41J2/1632 ,  B41J2/14145 ,  B41J2/1603 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1645 ,  B41J2/1646

摘要： A method for improving fluidic flow for a microfluidic device having a through hole or slot therein. The method includes the steps of forming one or more openings through at least part of a thickness of a substrate from a first surface to an opposite second surface using a reactive ion etching process whereby an etch stop layer is applied to side wall surfaces in the one or more openings during alternating etching and passivating steps as the openings are etched through at least a portion of the substrate. Substantially all of the etch stop layer coating is removed from the side wall surfaces by treating the side wall surfaces using a method selected from chemical treatment and mechanical treatment, whereby a surface energy of the treated side wall surfaces is increased relative to a surface energy of the side wall surfaces containing the etch stop layer coating.

摘要翻译： 一种用于改善其中具有通孔或槽的微流体装置的流体流动的方法。 该方法包括以下步骤：使用反应离子蚀刻工艺从基板的第一表面至相对的第二表面形成穿过衬底的至少一部分厚度的一个或多个开口，由此将蚀刻停止层施加到一个侧壁表面 或者在交替蚀刻和钝化步骤期间，当开口被蚀刻通过衬底的至少一部分时，可以有更多的开口。 通过使用选自化学处理和机械处理的方法处理侧壁表面，从侧壁表面去除基本上所有的蚀刻停止层涂层，由此所处理的侧壁表面的表面能相对于 所述侧壁表面包含所述蚀刻停止层涂层。

公开(公告)号：US20060189144A1

公开(公告)日：2006-08-24

申请号：US11063108

申请日：2005-02-22

申请人： John Krawczyk ,  Andrew McNees ,  Christopher Money ,  Girish Patil ,  David Rhine ,  Karthik Vaideeswaran

发明人： John Krawczyk ,  Andrew McNees ,  Christopher Money ,  Girish Patil ,  David Rhine ,  Karthik Vaideeswaran

IPC分类号： H01L21/30

CPC分类号： H01L21/0332 ,  B81B2203/0353 ,  B81C1/00531 ,  B81C1/00619 ,  B81C2201/0132 ,  B81C2201/014 ,  H01L21/0334 ,  H01L21/3081 ,  H01L21/3083

摘要： A process for etching semiconductor substrates using a deep reactive ion etching process to produce through holes or slots (hereinafter “slots”) in the substrates. The process includes applying a first layer to a back side of a substrate as a first etch stop material. The first layer is a relatively soft etch stop material. A second layer is applied to the first layer on the back side of the substrate to provide a composite etch stop layer. The second layer is a relatively hard etch stop material. The substrate is etched from a side opposite the back side of the substrate to provide a slot in the substrate.

摘要翻译： 使用深反应离子蚀刻工艺蚀刻半导体衬底以在衬底中产生通孔或槽（以下称为“槽”）的工艺。 该方法包括将第一层作为第一蚀刻停止材料施加到衬底的背面。 第一层是相对软的蚀刻停止材料。 将第二层施加到衬底的背面上的第一层以提供复合蚀刻停止层。 第二层是相对硬的蚀刻停止材料。 从与衬底的背面相对的一侧蚀刻衬底，以在衬底中提供槽。

公开(公告)号：US20070259292A1

公开(公告)日：2007-11-08

申请号：US11780234

申请日：2007-07-19

申请人： John Krawczyk ,  James Mrvos ,  Girish Patil ,  Jason Vanderpool ,  Brian Hart ,  Christopher Money ,  Jeanne Singh ,  Karthik Vaideeswaran

发明人： John Krawczyk ,  James Mrvos ,  Girish Patil ,  Jason Vanderpool ,  Brian Hart ,  Christopher Money ,  Jeanne Singh ,  Karthik Vaideeswaran

IPC分类号： G03C5/00 ,  H01L21/461 ,  H01L21/302

CPC分类号： B41J2/1603 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1645 ,  B81B2201/052 ,  B81C1/00531

摘要： A method of etching a semiconductor substrate. The method includes the steps of applying a photoresist etch mask layer to a device surface of the substrate. A select first area of the photoresist etch mask is masked, imaged and developed. A select second area of the photoresist etch mask layer is irradiated to assist in post etch stripping of the etch mask layer from the select second area. The substrate is etched to form fluid supply slots through a thickness of the substrate. At least the select second area of the etch mask layer is removed from the substrate, whereby mask layer residue formed from the select second area of the etch mask layer is significantly reduced.

摘要翻译： 蚀刻半导体衬底的方法。 该方法包括以下步骤：将光致抗蚀剂蚀刻掩模层施加到衬底的器件表面。 光刻胶蚀刻掩模的选择第一区被掩蔽，成像和显影。 照射光致抗蚀剂蚀刻掩模层的选择的第二区域以辅助蚀刻掩模层从选择的第二区域的后蚀刻剥离。 蚀刻基板以形成通过基板的厚度的流体供给槽。 至少蚀刻掩模层的选择第二区域从衬底去除，由此从蚀刻掩模层的选择的第二区域形成的掩模层残留物显着减少。

公开(公告)号：US20050205517A1

公开(公告)日：2005-09-22

申请号：US10941404

申请日：2004-09-15

申请人： John Krawczyk ,  James Mrvos ,  Girish Patil ,  Jason Vanderpool ,  Brian Hart ,  Christopher Money ,  Jeanne Singh ,  Karthik Vaideeswaran

发明人： John Krawczyk ,  James Mrvos ,  Girish Patil ,  Jason Vanderpool ,  Brian Hart ,  Christopher Money ,  Jeanne Singh ,  Karthik Vaideeswaran

IPC分类号： B41J2/16 ,  B41J2/05 ,  B44C1/22 ,  G11B5/127 ,  H01L21/302

CPC分类号： B41J2/1603 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1645 ,  B81B2201/052 ,  B81C1/00531

摘要： A method of etching a semiconductor substrate. The method includes the steps of applying a photoresist etch mask layer to a device surface of the substrate. A select first area of the photoresist etch mask is masked, imaged and developed. A select second area of the photoresist etch mask layer is irradiated to assist in post etch stripping of the etch mask layer from the select second area. The substrate is etched to form fluid supply slots through a thickness of the substrate. At least the select second area of the etch mask layer is removed from the substrate, whereby mask layer residue formed from the select second area of the etch mask layer is significantly reduced.

摘要翻译： 蚀刻半导体衬底的方法。 该方法包括以下步骤：将光致抗蚀剂蚀刻掩模层施加到衬底的器件表面。 光刻胶蚀刻掩模的选择第一区被掩蔽，成像和显影。 照射光致抗蚀剂蚀刻掩模层的选择的第二区域以辅助蚀刻掩模层从选择的第二区域的后蚀刻剥离。 蚀刻基板以形成通过基板的厚度的流体供给槽。 至少蚀刻掩模层的选择第二区域从衬底去除，由此从蚀刻掩模层的选择的第二区域形成的掩模层残留物显着减少。