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    A method of forming semiconductor structures
    1.
    发明申请
    A method of forming semiconductor structures 审中-公开
    一种形成半导体结构的方法

    公开(公告)号：US20060234469A1

    公开(公告)日：2006-10-19

    申请号：US11409134

    申请日：2006-04-21

    申请人： David Dickerson ,  Richard Lane ,  Charles Dennison ,  Kunal Parekh ,  Mark Fischer ,  John Zahurak

    发明人： David Dickerson ,  Richard Lane ,  Charles Dennison ,  Kunal Parekh ,  Mark Fischer ,  John Zahurak

    IPC分类号： H01L21/76

    CPC分类号： H01L21/76232 ,  H01L21/0332 ,  H01L21/76235

    摘要： In one aspect, the invention includes an isolation region forming method comprising: a) forming an oxide layer over a substrate; b) forming a nitride layer over the oxide layer, the nitride layer and oxide layer having a pattern of openings extending therethrough to expose portions of the underlying substrate; c) etching the exposed portions of the underlying substrate to form openings extending into the substrate; d) after etching the exposed portions of the underlying substrate, removing portions of the nitride layer while leaving some of the nitride layer remaining over the substrate; and e) after removing portions of the nitride layer, forming oxide within the openings in the substrate, the oxide within the openings forming at least portions of isolation regions. In another aspect, the invention includes an isolation region forming method comprising: a) forming a silicon nitride layer over a substrate; b) forming a masking layer over the silicon nitride layer; c) forming a pattern of openings extending through the masking layer to the silicon nitride layer; d) extending the openings through the silicon nitride layer to the underlying substrate, the silicon nitride layer having edge regions proximate the openings and having a central region between the edge regions; e) extending the openings into the underlying substrate; f) after extending the openings into the underlying substrate, reducing a thickness of the silicon nitride layer at the edge regions to thin the edge regions relative to the central region; and g) forming oxide within the openings.

    摘要翻译： 一方面，本发明包括一种隔离区形成方法，包括：a）在衬底上形成氧化物层; b）在所述氧化物层上形成氮化物层，所述氮化物层和氧化物层具有延伸穿过其中的开口图案以暴露所述下面的衬底的部分; c）蚀刻下面的衬底的暴露部分以形成延伸到衬底中的开口; d）在蚀刻下面的衬底的暴露部分之后，去除氮化物层的部分，同时留下一些保留在衬底上的氮化物层; 以及e）在去除所述氮化物层的部分之后，在所述衬底的所述开口内形成氧化物，所述开口内的氧化物形成至少部分隔离区域。 另一方面，本发明包括一种隔离区形成方法，包括：a）在衬底上形成氮化硅层; b）在氮化硅层上形成掩模层; c）形成延伸穿过掩模层的开口图案到氮化硅层; d）将开口穿过氮化硅层延伸到下面的衬底，氮化硅层具有靠近开口的边缘区域，并且在边缘区域之间具有中心区域; e）将开口延伸到下面的基底中; f）在将开口延伸到下面的基底之后，减小边缘区域处的氮化硅层的厚度，以使边缘区域相对于中心区域变薄; 和g）在开口内形成氧化物。

    Double blanket ion implant method and structure
    2.
    发明申请
    Double blanket ion implant method and structure 审中-公开
    双层离子注入法和结构

    公开(公告)号：US20050181567A1

    公开(公告)日：2005-08-18

    申请号：US11094377

    申请日：2005-03-31

    申请人： Mark Fischer ,  Charles Dennison ,  Fawad Ahmed ,  Richard Lane ,  John Zahurak ,  Kunal Parekh

    发明人： Mark Fischer ,  Charles Dennison ,  Fawad Ahmed ,  Richard Lane ,  John Zahurak ,  Kunal Parekh

    IPC分类号： H01L21/265 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8244

    CPC分类号： H01L21/2652 ,  H01L21/2658 ,  H01L21/28247 ,  H01L29/6656 ,  H01L29/6659

    摘要： A double blanket ion implant method for forming diffulsion regions in memory array devices, such as a MOSFET access device is disclosed. The method provides a semiconductor substrate with a gate structure formed on its surface Next, a first pair of diffulsion regions are formed in a region adjacent to the channel region by a first blanket ion implantation process. The first blanket ion implantation process has a first energy level and dose. The device is subjected to oxidizing conditions, which form oxidized sidewalls on the gate structure. A second blanket ion implantation process is conducted at the same location as the first ion implantation process adding additional dopant to the diffusion regions. The second blanket ion implantation process has a second energy level and dose. The resultant diffusion regions provide the device with improved static refresh performance over prior art devices. In addition, the first and second energy levels and doses are substantially lower than an energy level and dose used in a prior art single implantation process.

    摘要翻译： 公开了一种用于在诸如MOSFET访问装置的存储器阵列器件中形成差分区域的双层离子注入方法。 该方法提供了在其表面上形成栅极结构的半导体衬底。接下来，通过第一覆盖离子注入工艺在与沟道区相邻的区域中形成第一对差分区域。 第一次毯式离子注入工艺具有第一能级和剂量。 该器件经受氧化条件，其在栅极结构上形成氧化的侧壁。 在与第一离子注入工艺相同的位置处进行第二覆盖离子注入工艺，向扩散区域添加额外的掺杂剂。 第二次毯子离子注入过程具有第二能量水平和剂量。 所得到的扩散区域提供了比现有技术的装置更好的静态刷新性能的装置。 此外，第一和第二能量水平和剂量基本上低于现有技术单一植入过程中使用的能级和剂量。

    Method of forming a capacitor
    4.
    发明授权
    Method of forming a capacitor 失效

    公开(公告)号：US5789304A

    公开(公告)日：1998-08-04

    申请号：US741832

    申请日：1996-10-31

    申请人： Mark Fischer ,  Mark Jost ,  Kunal Parekh

    发明人： Mark Fischer ,  Mark Jost ,  Kunal Parekh

    IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/20

    CPC分类号： H01L27/10852 ,  H01L28/40 ,  Y10S148/02

    摘要： A semiconductor processing method of forming a stacked container capacitor includes, a) providing a pair of spaced conductive runners relative to a substrate, the conductive runners respectively having electrically insulative sidewall spacers and an electrically insulative cap, the caps having respective outer surfaces; b) providing a node between the runners to which electrical connection to a capacitor is to be made; c) providing an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node between the runners and having a first outer surface positioned outwardly of both runner caps, the pillar completely filling the space between the pair of runners at the location where the pillar is located; d) providing an insulating dielectric layer outwardly of the caps and the conductive pillar; e) etching a container opening through the insulating dielectric layer to outwardly expose the conductive pillar first outer surface; f) etching the exposed conductive pillar to define a pillar second outer surface which is closer to the node than the pillar first outer surface and to deepen the container opening; g) providing an electrically conductive storage node container layer within the container opening over the second outer conductive pillar surface; h) providing a capacitor dielectric layer over the capacitor storage node layer; and i) providing an electrically conductive outer capacitor plate over the capacitor dielectric layer. Such a capacitor construction is also disclosed.

    Method of forming a capacitor and a capacitor construction
    6.
    发明授权
    Method of forming a capacitor and a capacitor construction 失效
    电容器结构

    公开(公告)号：US5962885A

    公开(公告)日：1999-10-05

    申请号：US935966

    申请日：1997-09-23

    申请人： Mark Fischer ,  Mark Jost ,  Kunal Parekh

    发明人： Mark Fischer ,  Mark Jost ,  Kunal Parekh

    IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L27/108

    CPC分类号： H01L27/10852 ,  H01L28/40 ,  Y10S148/02

    摘要： The invention encompasses capacitor constructions. In one aspect, the invention includes a stacked capacitor construction comprising: a) a substrate; b) an electrically conductive runner provided on the substrate, the runner having an outer conductive surface; c) a node on the substrate adjacent the electrically conductive runner; d) an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node adjacent the conductive runner, the pillar having an outer surface; e) an electrically conductive storage node container layer in electrical connection with the pillar; f) a capacitor dielectric layer over the capacitor storage node layer; and g) an electrically conductive outer capacitor plate over the capacitor dielectric layer; and h) the pillar outer surface being elevationally inward of the runner outer surface.

    摘要翻译： 本发明包括电容器结构。 一方面，本发明包括堆叠式电容器结构，其包括：a）衬底; b）设置在所述基底上的导电流道，所述流道具有外导电表面; c）邻近导电流道的衬底上的节点; d）与所述节点电连接的导电柱，所述柱相对于邻近导电流道的节点向外突出，所述柱具有外表面; e）与所述支柱电连接的导电存储节点容器层; f）电容器存储节点层上的电容器介电层; 和g）电容器介电层上的导电外电容器板; 以及h）所述柱外表面位于所述流道外表面的正上方。

    Methods of forming fusible devices
    7.
    发明申请
    Methods of forming fusible devices 审中-公开
    形成易熔装置的方法

    公开(公告)号：US20060263987A1

    公开(公告)日：2006-11-23

    申请号：US11496251

    申请日：2006-07-31

    申请人： Mark Fischer ,  Zhiping Yin ,  Thomas Glass ,  Kunal Parekh ,  Gurtej Sandhu

    发明人： Mark Fischer ,  Zhiping Yin ,  Thomas Glass ,  Kunal Parekh ,  Gurtej Sandhu

    IPC分类号： H01L21/336

    CPC分类号： H01L23/5256 ,  H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention relates to a laser fuse. The laser fuse comprises an element comprising a heat conductive material. The fuse also includes an absorption element comprising a material with an adjustable capacity for heat or light absorption that overlays the heat conductive element. The fuse also includes an outer insulating element that overlays and encloses the heat conductive element and the absorption element.

    摘要翻译： 本发明涉及一种激光熔丝。 激光熔丝包括包含导热材料的元件。 保险丝还包括吸收元件，该吸收元件包括具有与热传导元件重叠的热或光吸收的可调容量的材料。 保险丝还包括覆盖并包围导热元件和吸收元件的外绝缘元件。

    Method of forming a cylindrical container stacked capacitor
    10.
    发明授权
    Method of forming a cylindrical container stacked capacitor 失效
    形成圆柱形容器堆叠电容器的方法

    公开(公告)号：US5604147A

    公开(公告)日：1997-02-18

    申请号：US440212

    申请日：1995-05-12

    申请人： Mark Fischer ,  Mark Jost ,  Kunal Parekh

    发明人： Mark Fischer ,  Mark Jost ,  Kunal Parekh

    IPC分类号： H01L21/02 ,  H01L21/8242

    CPC分类号： H01L27/10852 ,  H01L28/40 ,  Y10S148/02

    摘要： A semiconductor processing method of forming a stacked container capacitor includes, a) providing a pair of spaced conductive runners relative to a substrate, the conductive runners respectively having electrically insulative sidewall spacers and an electrically insulative cap, the caps having respective outer surfaces; b) providing a node between the runners to which electrical connection to a capacitor is to be made; c) providing an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node between the runners and having a first outer surface positioned outwardly of both runner caps, the pillar completely filling the space between the pair of runners at the location where the pillar is located; d) providing an insulating dielectric layer outwardly of the caps and the conductive pillar; e) etching a container opening through the insulating dielectric layer to outwardly expose the conductive pillar first outer surface; f) etching the exposed conductive pillar to define a pillar second outer surface which is closer to the node than the pillar first outer surface and to deepen the container opening; g) providing an electrically conductive storage node container layer within the container opening over the second outer conductive pillar surface; h) providing a capacitor dielectric layer over the capacitor storage node layer; and i) providing an electrically conductive outer capacitor plate over the capacitor dielectric layer. Such a capacitor construction is also disclosed.

    摘要翻译： 形成层叠容器电容器的半导体处理方法包括：a）相对于衬底提供一对隔开的导电流道，所述导电流道分别具有电绝缘侧壁间隔件和电绝缘帽，所述帽具有相应的外表面; b）在要与电容器进行电连接的流道之间提供节点; c）提供与所述节点电连接的导电柱，所述柱相对于所述流道之间的节点向外突出，并且具有位于两个流道盖之外的第一外表面，所述柱完全填充所述一对流道之间的空间， 支柱所在的位置; d）在盖和导电柱之外提供绝缘介电层; e）蚀刻穿过所述绝缘介电层的容器开口以向外暴露所述导电柱第一外表面; f）蚀刻暴露的导电柱以限定比第一外表面更靠近节点的支柱第二外表面并加深容器开口; g）在第二外导电柱表面之上的容器开口内提供导电存储节点容器层; h）在所述电容器存储节点层上提供电容器介电层; 以及i）在所述电容器介电层上方提供导电的外部电容器板。 还公开了这种电容器结构。