公开(公告)号：US07424022B2

公开(公告)日：2008-09-09

申请号：US10394506

申请日：2003-03-21

Applicant: Pascal Moniot ,  David Furodet

Inventor： Pascal Moniot ,  David Furodet

IPC: H04L12/28 ,  G06F12/00

CPC classification number: H04L12/56 ,  H04L45/742

Abstract: A method for providing a context datum associated with a source and/or destination device based on an address datum associated with the device, including addressing, based on the address datum, a unit for providing an index, the unit containing, for each address datum, an indicator indicating whether the device is active; and addressing, based on the index provided by the unit, a context memory for providing the context datum associated with the device.

Abstract translation: 一种用于基于与所述设备相关联的地址数据提供与源和/或目的地设备相关联的上下文数据的方法，包括基于所述地址数据寻址用于提供索引的单元，所述单元包含针对每个地址基准 指示设备是否活动的指示灯; 以及基于由所述单元提供的索引来寻址用于提供与所述设备相关联的上下文数据的上下文存储器。

公开(公告)号：US20070075878A1

公开(公告)日：2007-04-05

申请号：US11533543

申请日：2006-09-20

Applicant: David Furodet ,  Nicolas Albarel

Inventor： David Furodet ,  Nicolas Albarel

IPC: H03M7/00

CPC classification number: G06F17/30985

Abstract: A memory circuit for an Aho-Corasick type character recognition automaton uses a node tree for recognizing predetermined strings of characters in an incoming data stream. The recognization is based upon successive transitions in the node tree stored in memory in which each node corresponds to a recognized sequence of a character string. At least part of the nodes are related to a consecutive node by a valid transition, from an initial state to terminal states, with each one corresponding to a recognized character string This memory circuit includes first sets of consecutive memory addresses defining respectively strings of consecutive nodes accessible sequentially during successive transitions to a terminal state, and second sets of memory addresses defining multiple nodes each pointing to several states.

Abstract translation: 用于Aho-Corasick型字符识别自动机的存储器电路使用节点树来识别输入数据流中的预定字符串。 识别基于存储在存储器中的节点树中的连续转换，其中每个节点对应于识别的字符串的序列。 至少部分节点通过从初始状态到终端状态的有效转换与连续节点相关联，其中每一个对应于识别的字符串。该存储器电路包括分别定义连续节点序列的第一组连续存储器地址 在连续过渡到终端状态期间可顺序访问，以及定义多个节点的第二组存储器地址，每个指向多个状态。

公开(公告)号：US20110010605A1

公开(公告)日：2011-01-13

申请号：US12754845

申请日：2010-04-06

Applicant: David Furodet

Inventor： David Furodet

IPC: H03M13/29 ,  G06F11/10

CPC classification number: H03M13/09 ,  H03M13/033 ,  H03M13/036 ,  H03M13/17

Abstract: A method is for transmitting a binary information word (MI) coded on r bits to which is attached a redundancy (CRC) coded on s bits, s and r being integers. The redundancy (CRC) signals the appearance of erroneous bits after the transmission, and is obtained by carrying out a Euclidian division of the information word (MI) to be transmitted by a generator polynomial coded on at most s bits. The generator polynomial is chosen so that it satisfies at least one of the following conditions, namely that the Hamming weight of the multiples of the generator polynomial is greater than or equal to a chosen threshold, or the generator polynomial allows the detection of at least 2s-1−3 consecutive erroneous bits.

Abstract translation: 一种方法是用于发送在r比特上编码的二进制信息字（MI），附加了以s位编码的冗余（CRC），s和r为整数。 冗余（CRC）在发送之后发出错误比特的出现，并且通过执行由最多s比特编码的生成多项式来发送的信息字（MI）的欧几里德除法获得。 选择生成多项式使得其满足以下条件中的至少一个，即生成多项式的倍数的汉明权重大于或等于所选择的阈值，或者生成多项式允许检测至少2s -1-3个连续的错误位。

公开(公告)号：US07275077B2

公开(公告)日：2007-09-25

申请号：US10395041

申请日：2003-03-21

Applicant: Pascal Moniot ,  David Furodet

Inventor： Pascal Moniot ,  David Furodet

IPC: G06F15/16 ,  G06F9/26 ,  H04L12/28

CPC classification number: H04L61/6022 ,  H04L29/12009 ,  H04L29/12801 ,  H04L29/12839 ,  H04L61/6004

Abstract: A method for associating with a first address a second address of reduced size, comprising: calculating a first intermediary address by the first address, the first intermediary address having a reduced size with respect to the first address; then choosing as a second address the first intermediary address if this second address is not associated with another first address, or, otherwise, calculating a second intermediary address by a first polynomial division of the first address, the second intermediary address having a reduced size as compared to the first address; then choosing as a second address the second intermediary address.

Abstract translation: 一种用于将缩小尺寸的第二地址与第一地址相关联的方法，包括：通过所述第一地址计算第一中间地址，所述第一中间地址相对于所述第一地址具有减小的大小; 然后如果该第二地址不与另一个第一地址相关联，则选择第二地址作为第二中间地址，否则，通过第一地址的第一多项式除法来计算第二中间地址，第二中间地址的大小减小为 与第一个地址相比; 然后选择第二个地址作为第二个中间地址。

公开(公告)号：US09158665B2

公开(公告)日：2015-10-13

申请号：US13485606

申请日：2012-05-31

Applicant: David Furodet

Inventor： David Furodet

IPC: G06F9/44 ,  G06F11/36

CPC classification number: G06F11/3688

Abstract: One embodiment of the present invention provides a system that facilitates testing a multi-threaded software application. During operation, the system, in response to invocation of a mock object, identifies a thread and determines whether the identified thread matches a description associated with an actor. The system, in response to the identified thread matching the description associated with the actor, evaluates whether an expectation is met or a stub is executed and returns a value based on the evaluation. In some embodiments, the expectation and the stub are expressed based on a role, wherein the role includes the actor and, optionally, one or more additional actors.

Abstract translation: 本发明的一个实施例提供了一种便于测试多线程软件应用的系统。 在操作期间，系统响应于模拟对象的调用，识别线程并确定所识别的线程是否匹配与演员相关联的描述。 该系统响应于与该actor相关联的描述匹配的所识别的线程，评估是满足期望还是执行存根，并且基于评估返回值。 在一些实施例中，期望和存根基于角色来表示，其中角色包括角色以及可选地一个或多个附加角色。

公开(公告)号：US08849841B2

公开(公告)日：2014-09-30

申请号：US11533543

申请日：2006-09-20

Applicant: David Furodet ,  Nicolas Albarel

Inventor： David Furodet ,  Nicolas Albarel

IPC: G06F7/00 ,  G06F17/30

CPC classification number: G06F17/30985

Abstract: A memory circuit for an Aho-Corasick type character recognition automaton uses a node tree for recognizing predetermined strings of characters in an incoming data stream. The recognization is based upon successive transitions in the node tree stored in memory in which each node corresponds to a recognized sequence of a character string. At least part of the nodes are related to a consecutive node by a valid transition, from an initial state to terminal states, with each one corresponding to a recognized character string This memory circuit includes first sets of consecutive memory addresses defining respectively strings of consecutive nodes accessible sequentially during successive transitions to a terminal state, and second sets of memory addresses defining multiple nodes each pointing to several states.

Abstract translation: 用于Aho-Corasick型字符识别自动机的存储器电路使用节点树来识别输入数据流中的预定字符串。 识别基于存储在存储器中的节点树中的连续转换，其中每个节点对应于识别的字符串的序列。 至少部分节点通过从初始状态到终端状态的有效转换与连续节点相关联，其中每一个对应于识别的字符串。该存储器电路包括分别定义连续节点序列的第一组连续存储器地址 在连续过渡到终端状态期间可顺序访问，以及定义多个节点的第二组存储器地址，每个指向多个状态。

公开(公告)号：US20130326483A1

公开(公告)日：2013-12-05

申请号：US13485606

申请日：2012-05-31

Applicant: David Furodet

Inventor： David Furodet

IPC: G06F9/44

CPC classification number: G06F11/3688

Abstract: One embodiment of the present invention provides a system that facilitates testing a multi-threaded software application. During operation, the system, in response to invocation of a mock object, identifies a thread and determines whether the identified thread matches a description associated with an actor. The system, in response to the identified thread matching the description associated with the actor, evaluates whether an expectation is met or a stub is executed and returns a value based on the evaluation. In some embodiments, the expectation and the stub are expressed based on a role, wherein the role includes the actor and, optionally, one or more additional actors.

Abstract translation: 本发明的一个实施例提供了一种便于测试多线程软件应用的系统。 在操作期间，系统响应于模拟对象的调用，识别线程并确定所识别的线程是否匹配与演员相关联的描述。 该系统响应于与该actor相关联的描述匹配的所识别的线程，评估是满足期望还是执行存根，并且基于评估返回值。 在一些实施例中，期望和存根基于角色来表示，其中角色包括角色以及可选地一个或多个附加角色。

公开(公告)号：US08572468B2

公开(公告)日：2013-10-29

申请号：US12754845

申请日：2010-04-06

Applicant: David Furodet

Inventor： David Furodet

IPC: H03M13/00

CPC classification number: H03M13/09 ,  H03M13/033 ,  H03M13/036 ,  H03M13/17

Abstract: A method is for transmitting a binary information word (MI) coded on r bits to which is attached a redundancy (CRC) coded on s bits, s and r being integers. The redundancy (CRC) signals the appearance of erroneous bits after the transmission, and is obtained by carrying out a Euclidian division of the information word (MI) to be transmitted by a generator polynomial coded on at most s bits. The generator polynomial is chosen so that it satisfies at least one of the following conditions, namely that the Hamming weight of the multiples of the generator polynomial is greater than or equal to a chosen threshold, or the generator polynomial allows the detection of at least 2s-1-3 consecutive erroneous bits.

Abstract translation: 一种方法是用于发送在r比特上编码的二进制信息字（MI），附加了以s位编码的冗余（CRC），s和r为整数。 冗余（CRC）在发送之后发出错误比特的出现，并且通过执行由最多s比特编码的生成多项式来发送的信息字（MI）的欧几里德除法获得。 选择生成多项式使得其满足以下条件中的至少一个，即生成多项式的倍数的汉明权重大于或等于所选择的阈值，或者生成多项式允许检测至少2s -1-3个连续的错误位。

公开(公告)号：US07860712B2

公开(公告)日：2010-12-28

申请号：US11555888

申请日：2006-11-02

Applicant: David Furodet ,  Nicolas Albarel

Inventor： David Furodet ,  Nicolas Albarel

IPC: G06K9/18 ,  G06F12/02

CPC classification number: G06K9/723 ,  G06K2209/01

Abstract: A method of storing data in a memory circuit of an Aho-Corasick type character recognition automaton recognizes character strings by implementing successive transitions in a tree of nodes stored in a memory. Each node corresponds to a state of the automaton and to a recognition of a sequence of the character string. Each node is associated with a transition vector serves to determine the destination node or nodes of a transition. For storage of the data, a test is performed to find out whether transition vectors point to common destination addresses. The transition vectors are combined if the addresses to which the vectors point are separate by formulating a combination vector and the nodes are stored at the memory addresses pointed at by the combination vector.

Abstract translation: 将数据存储在Aho-Corasick型字符识别自动机的存储器电路中的方法通过在存储器中存储的节点的树中实现连续的转换来识别字符串。 每个节点对应于自动机的状态和对字符串的序列的识别。 每个节点与转换向量相关联，用于确定转换的目标节点或节点。 为了存储数据，执行测试以确定转移向量是否指向公共目标地址。 如果通过制定组合向量将矢量点分开的地址与节点存储在由组合向量指向的存储器地址处，则组合转换向量。

公开(公告)号：US20070104375A1

公开(公告)日：2007-05-10

申请号：US11555888

申请日：2006-11-02

Applicant: David Furodet ,  Nicolas Albarel

Inventor： David Furodet ,  Nicolas Albarel

IPC: G06K9/72

CPC classification number: G06K9/723 ,  G06K2209/01

Abstract: A method of storing data in a memory circuit of an Aho-Corasick type character recognition automaton recognizes character strings by implementing successive transitions in a tree of nodes stored in a memory. Each node corresponds to a state of the automaton and to a recognition of a sequence of the character string. Each node is associated with a transition vector serves to determine the destination node or nodes of a transition. For storage of the data, a test is performed to find out whether transition vectors point to common destination addresses. The transition vectors are combined if the addresses to which the vectors point are separate by formulating a combination vector and the nodes are stored at the memory addresses pointed at by the combination vector.

Abstract translation: 将数据存储在Aho-Corasick型字符识别自动机的存储器电路中的方法通过在存储器中存储的节点的树中实现连续的转换来识别字符串。 每个节点对应于自动机的状态和对字符串的序列的识别。 每个节点与转换向量相关联，用于确定转换的目标节点或节点。 为了存储数据，执行测试以确定转移向量是否指向公共目标地址。 如果通过制定组合向量将矢量点分开的地址与节点存储在由组合向量指向的存储器地址处，则组合转换向量。