公开(公告)号：US06415343B1

公开(公告)日：2002-07-02

申请号：US09955618

申请日：2001-09-19

申请人： David J. Fensore ,  Kent Bruce Waterson ,  Gregory Lewis Dean ,  Robert Macomber

发明人： David J. Fensore ,  Kent Bruce Waterson ,  Gregory Lewis Dean ,  Robert Macomber

IPC分类号： G06F1300

CPC分类号： G06F13/426

摘要： A method and apparatus for dynamically assigning and enabling a unique functional address for a Universal Serial Bus device. A host assigns the unique functional address during a control transaction. The Universal Serial Bus device disables the default address and enables the unique functional address during a status stage of the control transaction to avoid an error window.

摘要翻译： 一种用于为通用串行总线设备动态分配和启用唯一功能地址的方法和装置。 主机在控制事务期间分配唯一的功能地址。 通用串行总线设备禁用默认地址，并在控制事务的状态阶段启用唯一的功能地址，以避免错误窗口。

公开(公告)号：US06353866B1

公开(公告)日：2002-03-05

申请号：US09003925

申请日：1998-01-07

申请人： David J. Fensore ,  Kent Bruce Waterson ,  Gregory Lewis Dean ,  Robert Macomber

发明人： David J. Fensore ,  Kent Bruce Waterson ,  Gregory Lewis Dean ,  Robert Macomber

IPC分类号： G06F1300

CPC分类号： G06F13/426

摘要： A method and apparatus for dynamically assigning and enabling a unique functional address for a Universal Serial Bus device. A host assigns the unique functional address during a control transaction. The Universal Serial Bus device disables the default address and enables the unique functional address during a status stage of the control transaction to avoid an error window.

公开(公告)号：US20050287047A1

公开(公告)日：2005-12-29

申请号：US11198172

申请日：2005-08-08

申请人： James Clarkin ,  Gary Nelson ,  Robert Macomber

发明人： James Clarkin ,  Gary Nelson ,  Robert Macomber

IPC分类号： G01N21/03 ,  B01L3/00 ,  B81B1/00 ,  C12M3/04 ,  G01N35/08 ,  G01N37/00

CPC分类号： B01L3/502715 ,  B01L3/502707 ,  B01L2200/12 ,  B01L2300/0654 ,  B81B1/002 ,  B81B2201/058 ,  G01N27/44721

摘要： Micro channel array devices drawn from a bulk preform having an array of components to reduce the cross section. The reduced cross section fiber like structure is cut to produce individual arrays of small scale. End caps are drawn and optionally micro machined. The end caps are used to provide input and output ports and other structures for use with the micro channel arrays. A micro channel array may be used with different end caps for analysis and may form a lab on a chip or a component thereof.

摘要翻译： 从具有组件阵列的大块预制件中绘制的微通道阵列器件以减小横截面。 切割截面纤维的结构被切割以产生小规模的单个阵列。 绘制端盖并可选择微加工。 端盖用于提供用于微通道阵列的输入和输出端口和其他结构。 微通道阵列可以与不同的端盖一起用于分析，并且可以在芯片或其部件上形成实验室。

公开(公告)号：US5913071A

公开(公告)日：1999-06-15

申请号：US97438

申请日：1993-07-26

申请人： Robert Macomber

发明人： Robert Macomber

IPC分类号： G06F13/24 ,  G06F13/00

CPC分类号： G06F13/24

摘要： A peripheral device and a host device implement a scalar interrupt-acknowledgement system. The peripheral device detects events and increments an unprocessed counter in response to each detected event. The host device processes the events and increments a processed counter in response to each processed event. After a number of events have been processed, the host device transmits the value held by the processed counter to the peripheral device. In response, the peripheral device subtracts the value of the processed counter from the value of the unprocessed counter. The peripheral device asserts an interrupt when events remain to be processed and deasserts the interrupt when all the events have been processed.

摘要翻译： 外围设备和主机设备实现标量中断确认系统。 外围设备响应于每个检测到的事件来检测事件并递增未处理的计数器。 主机设备处理事件并响应于每个处理的事件递增处理的计数器。 在处理了多个事件之后，主机将通过处理的计数器保存的值发送到外围设备。 作为响应，外围设备从未处理的计数器的值中减去处理的计数器的值。 当事件保持待处理时，外围设备断言一个中断，并且当所有事件都被处理时，它将取消中断中断。