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公开(公告)号:US07767103B2
公开(公告)日:2010-08-03
申请号:US10940917
申请日:2004-09-14
申请人: David L. Bernard , John W. Krawczyk , Christopher J. Money , Andrew L. McNees , Girish S. Patil , Karthik Vaideeswaran , Richard L. Warner
发明人: David L. Bernard , John W. Krawczyk , Christopher J. Money , Andrew L. McNees , Girish S. Patil , Karthik Vaideeswaran , Richard L. Warner
CPC分类号: B41J2/1603 , B41J2/14129 , B41J2/1628 , B41J2/1631 , B41J2/1642 , B41J2/1645 , B41J2/1646
摘要: A micro-fluid ejection assembly and method therefor. The micro-fluid ejection assembly includes a silicon substrate having a fluid supply slot therein. The fluid supply slot is formed by an etch process conducted on a substrate using, a first etch mask circumscribing the fluid supply slot, and a second etch mask applied over a functional layer on the substrate.
摘要翻译: 微流体喷射组件及其方法。 微流体喷射组件包括其中具有流体供应槽的硅衬底。 流体供应槽由在衬底上进行的蚀刻工艺形成,使用限定流体供应槽的第一蚀刻掩模和施加在衬底上的功能层上的第二蚀刻掩模。
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公开(公告)号:US07041226B2
公开(公告)日:2006-05-09
申请号:US10701225
申请日:2003-11-04
申请人: Karthik Vaideeswaran , Andrew L. McNees , John W. Krawczyk , James M. Mrvos , Cory N. Hammond , Mark L. Doerre , Jason T. Vanderpool , Girish S. Patil , Christopher J. Money , Gary R. Williams , Richard L. Warner
发明人: Karthik Vaideeswaran , Andrew L. McNees , John W. Krawczyk , James M. Mrvos , Cory N. Hammond , Mark L. Doerre , Jason T. Vanderpool , Girish S. Patil , Christopher J. Money , Gary R. Williams , Richard L. Warner
CPC分类号: B41J2/1632 , B41J2/14145 , B41J2/1603 , B41J2/1623 , B41J2/1628 , B41J2/1631 , B41J2/1645 , B41J2/1646
摘要: A method for improving fluidic flow for a microfluidic device having a through hole or slot therein. The method includes the steps of forming one or more openings through at least part of a thickness of a substrate from a first surface to an opposite second surface using a reactive ion etching process whereby an etch stop layer is applied to side wall surfaces in the one or more openings during alternating etching and passivating steps as the openings are etched through at least a portion of the substrate. Substantially all of the etch stop layer coating is removed from the side wall surfaces by treating the side wall surfaces using a method selected from chemical treatment and mechanical treatment, whereby a surface energy of the treated side wall surfaces is increased relative to a surface energy of the side wall surfaces containing the etch stop layer coating.
摘要翻译: 一种用于改善其中具有通孔或槽的微流体装置的流体流动的方法。 该方法包括以下步骤:使用反应离子蚀刻工艺从基板的第一表面至相对的第二表面形成穿过衬底的至少一部分厚度的一个或多个开口,由此将蚀刻停止层施加到一个侧壁表面 或者在交替蚀刻和钝化步骤期间,当开口被蚀刻通过衬底的至少一部分时,可以有更多的开口。 通过使用选自化学处理和机械处理的方法处理侧壁表面,从侧壁表面去除基本上所有的蚀刻停止层涂层,由此所处理的侧壁表面的表面能相对于 所述侧壁表面包含所述蚀刻停止层涂层。
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公开(公告)号:US07344994B2
公开(公告)日:2008-03-18
申请号:US11063108
申请日:2005-02-22
申请人: John W. Krawczyk , Andrew L. McNees , Christopher J. Money , Girish S. Patil , David B. Rhine , Karthik Vaideeswaran
发明人: John W. Krawczyk , Andrew L. McNees , Christopher J. Money , Girish S. Patil , David B. Rhine , Karthik Vaideeswaran
IPC分类号: H01L21/302 , H01L21/461
CPC分类号: H01L21/0332 , B81B2203/0353 , B81C1/00531 , B81C1/00619 , B81C2201/0132 , B81C2201/014 , H01L21/0334 , H01L21/3081 , H01L21/3083
摘要: A process for etching semiconductor substrates using a deep reactive ion etching process to produce through holes or slots (hereinafter “slots”) in the substrates. The process includes applying a first layer to a back side of a substrate as a first etch stop material. The first layer is a relatively soft etch stop material. A second layer is applied to the first layer on the back side of the substrate to provide a composite etch stop layer. The second layer is a relatively hard etch stop material. The substrate is etched from a side opposite the back side of the substrate to provide a slot in the substrate.
摘要翻译: 使用深反应离子蚀刻工艺蚀刻半导体衬底以在衬底中产生通孔或槽(以下称为“槽”)的工艺。 该方法包括将第一层作为第一蚀刻停止材料施加到衬底的背面。 第一层是相对软的蚀刻停止材料。 将第二层施加到衬底的背面上的第一层以提供复合蚀刻停止层。 第二层是相对硬的蚀刻停止材料。 从与衬底的背面相对的一侧蚀刻衬底,以在衬底中提供槽。
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公开(公告)号:US07438392B2
公开(公告)日:2008-10-21
申请号:US11281090
申请日:2005-11-17
申请人: Karthik Vaideeswaran , Andrew L. McNees , John W. Krawczyk , James M. Mrvos , Mark L. Doerre , Jason T. Vanderpool , Girish S. Patil , Richard L. Warner
发明人: Karthik Vaideeswaran , Andrew L. McNees , John W. Krawczyk , James M. Mrvos , Mark L. Doerre , Jason T. Vanderpool , Girish S. Patil , Richard L. Warner
IPC分类号: B41J2/05
CPC分类号: B41J2/1632 , B41J2/14145 , B41J2/1603 , B41J2/1623 , B41J2/1628 , B41J2/1631 , B41J2/1645 , B41J2/1646
摘要: A method for improving fluidic flow for a microfluidic device having a through hole or slot therein. The method includes the steps of forming one or more openings through at least part of a thickness of a substrate from a first surface to an opposite second surface using a reactive ion etching process whereby an etch stop layer is applied to side wall surfaces in the one or more openings during alternating etching and passivating steps as the openings are etched through at least a portion of the substrate. Substantially all of the etch stop layer coating is removed from the side wall surfaces by treating the side wall surfaces using a method selected from chemical treatment and mechanical treatment, whereby a surface energy of the treated side wall surfaces is increased relative to a surface energy of the side wall surfaces containing the etch stop layer coating.
摘要翻译: 一种用于改善其中具有通孔或槽的微流体装置的流体流动的方法。 该方法包括以下步骤:使用反应离子蚀刻工艺从基板的第一表面至相对的第二表面形成穿过衬底的至少一部分厚度的一个或多个开口,由此将蚀刻停止层施加到一个侧壁表面 或者在交替蚀刻和钝化步骤期间,当开口被蚀刻通过衬底的至少一部分时,可以有更多的开口。 通过使用选自化学处理和机械处理的方法处理侧壁表面,从侧壁表面去除基本上所有的蚀刻停止层涂层,由此所处理的侧壁表面的表面能相对于 所述侧壁表面包含所述蚀刻停止层涂层。
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公开(公告)号:US07938975B2
公开(公告)日:2011-05-10
申请号:US11780234
申请日:2007-07-19
申请人: John W. Krawczyk , James M. Mrvos , Girish S. Patil , Jason T. Vanderpool , Brian C. Hart , Christopher J. Money , Jeanne M. Saldanha Singh , Karthik Vaideeswaran
发明人: John W. Krawczyk , James M. Mrvos , Girish S. Patil , Jason T. Vanderpool , Brian C. Hart , Christopher J. Money , Jeanne M. Saldanha Singh , Karthik Vaideeswaran
IPC分类号: G11B5/127
CPC分类号: B41J2/1603 , B41J2/1628 , B41J2/1631 , B41J2/1645 , B81B2201/052 , B81C1/00531
摘要: A method of etching a semiconductor substrate. The method includes the steps of applying a photoresist etch mask layer to a device surface of the substrate. A select first area of the photoresist etch mask is masked, imaged and developed. A select second area of the photoresist etch mask layer is irradiated to assist in post etch stripping of the etch mask layer from the select second area. The substrate is etched to form fluid supply slots through a thickness of the substrate. At least the select second area of the etch mask layer is removed from the substrate, whereby mask layer residue formed from the select second area of the etch mask layer is significantly reduced.
摘要翻译: 蚀刻半导体衬底的方法。 该方法包括以下步骤:将光致抗蚀剂蚀刻掩模层施加到衬底的器件表面。 光刻胶蚀刻掩模的选择第一区被掩蔽,成像和显影。 照射光致抗蚀剂蚀刻掩模层的选择的第二区域以辅助蚀刻掩模层从选择的第二区域的后蚀刻剥离。 蚀刻基板以形成通过基板的厚度的流体供给槽。 至少蚀刻掩模层的选择第二区域从衬底去除,由此从蚀刻掩模层的选择的第二区域形成的掩模层残留物显着减少。
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公开(公告)号:US07271105B2
公开(公告)日:2007-09-18
申请号:US10941404
申请日:2004-09-15
申请人: John W. Krawczyk , James M. Mrvos , Girish S. Patil , Jason T. Vanderpool , Brian C. Hart , Christopher J. Money , Jeanne M. Saldanha Singh , Karthik Vaideeswaran
发明人: John W. Krawczyk , James M. Mrvos , Girish S. Patil , Jason T. Vanderpool , Brian C. Hart , Christopher J. Money , Jeanne M. Saldanha Singh , Karthik Vaideeswaran
IPC分类号: H01L21/461
CPC分类号: B41J2/1603 , B41J2/1628 , B41J2/1631 , B41J2/1645 , B81B2201/052 , B81C1/00531
摘要: A method of etching a semiconductor substrate. The method includes the steps of applying a photoresist etch mask layer to a device surface of the substrate. A select first area of the photoresist etch mask is masked, imaged and developed. A select second area of the photoresist etch mask layer is irradiated to assist in post etch stripping of the etch mask layer from the select second area. The substrate is etched to form fluid supply slots through a thickness of the substrate. At least the select second area of the etch mask layer is removed from the substrate, whereby mask layer residue formed from the select second area of the etch mask layer is significantly reduced.
摘要翻译: 蚀刻半导体衬底的方法。 该方法包括以下步骤:将光致抗蚀剂蚀刻掩模层施加到衬底的器件表面。 光刻胶蚀刻掩模的选择第一区被掩蔽,成像和显影。 照射光致抗蚀剂蚀刻掩模层的选择的第二区域以辅助蚀刻掩模层从选择的第二区域的后蚀刻剥离。 蚀刻基板以形成通过基板的厚度的流体供给槽。 至少蚀刻掩模层的选择第二区域从衬底去除,由此从蚀刻掩模层的选择的第二区域形成的掩模层残留物显着减少。
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公开(公告)号:US07202178B2
公开(公告)日:2007-04-10
申请号:US11002453
申请日:2004-12-01
IPC分类号: H01L21/302
CPC分类号: B41J2/1628 , B41J2/1433 , B41J2/162
摘要: A method of micro-machining a semiconductor substrate to form through slots therein and substrates made by the method. The method includes providing a dry etching chamber having a platen for holding a semiconductor substrate. During an etching cycle of a dry etch process for the semiconductor substrate, a source power is decreased, a chamber pressure is decreased from a first pressure to a second pressure, and a platen power is increased from a first power to a second power. Through slots in the substrate provided by the method can have a reentrant profile for fluid flow therethrough.
摘要翻译: 一种微加工半导体衬底以形成通孔的方法和通过该方法制成的衬底。 该方法包括提供具有用于保持半导体衬底的压板的干蚀刻室。 在用于半导体衬底的干蚀刻工艺的蚀刻循环期间,源功率降低,腔室压力从第一压力降低到第二压力,并且压板功率从第一功率增加到第二功率。 通过该方法提供的衬底中的通孔可以具有用于流过其中的流体流通的折返轮廓。
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公开(公告)号:US07413915B2
公开(公告)日:2008-08-19
申请号:US11001227
申请日:2004-12-01
IPC分类号: H01L21/3065 , B41J2/01
CPC分类号: H01L21/30655 , B41J2/14129 , B41J2/1603 , B41J2/1628 , B41J2/1632
摘要: Methods of micro-machining a semiconductor substrate to form through fluid feed slots therein. One method includes providing a semiconductor substrate wafer having a thickness greater than about 500 microns and having a device side and a back side opposite the device side. The back side of the wafer is mechanically ground to provide a wafer having a thickness ranging from about 100 up to about 500 microns. Dry etching is conducted on the wafer from a device side thereof to form a plurality of reentrant fluid feed slots in the wafer from the device side to the back side of the wafer.
摘要翻译: 微型加工半导体衬底以通过其中的流体馈送槽形成的方法。 一种方法包括提供厚度大于约500微米的半导体衬底晶片,并且具有与器件侧相对的器件侧和背面。 将晶片的背面机械地研磨以提供具有约100至约500微米厚度的晶片。 从晶片的器件侧对晶片进行干蚀刻,从晶片的器件侧到背面形成多个可重入流体供给槽。
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公开(公告)号:US07560223B2
公开(公告)日:2009-07-14
申请号:US11026353
申请日:2004-12-30
IPC分类号: B41J2/16
CPC分类号: B41J2/1603 , B41J2/1628 , B41J2/1631 , G01D15/00
摘要: Methods of forming a fluid channel in a semiconductor substrate may include providing a semiconductor substrate having a backside and a device side, wherein the device side is configured to secure ink ejecting devices thereon and applying a material layer to the backside of the semiconductor substrate. The method may further include providing a gray scale mask configured with a pattern corresponding to a fluid channel having a plurality of slots, exposing the material layer to sufficient light radiation energy through the gray scale mask and etching the exposed material layer and the semiconductor substrate through to the device side of the semiconductor substrate.
摘要翻译: 在半导体衬底中形成流体通道的方法可以包括提供具有背面和器件侧的半导体衬底,其中器件侧被配置为在其上固定墨水喷射装置,并将材料层施加到半导体衬底的背面。 该方法还可以包括提供一个配置有与具有多个槽的流体通道相对应的图案的灰度掩模,该材料层通过灰度级掩模暴露于足够的光辐射能量,并通过暴露的材料层和半导体衬底 到半导体衬底的器件侧。
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公开(公告)号:US07850284B2
公开(公告)日:2010-12-14
申请号:US11779085
申请日:2007-07-17
IPC分类号: B41J2/05
CPC分类号: B41J2/1603 , B41J2/1628 , B81B2201/052 , B81C1/00087
摘要: A method of micro-machining a semiconductor substrate to form one or more through slots therein. The semiconductor substrate has a device side and a fluid side opposite the device side. The method includes diffusing a p-type doping material into the device side of the semiconductor substrate in one or more through slot locations to be etched through a thickness of the substrates. The semiconductor substrate is then etched with a dry etch process from the device side of the substrate to the fluid side of the substrate so that one or more through slots having a reentrant profile are formed in the substrate.
摘要翻译: 一种微加工半导体衬底以在其中形成一个或多个通孔的方法。 半导体衬底具有与器件侧相对的器件侧和流体侧。 该方法包括将p型掺杂材料扩散到半导体衬底的一个或多个通孔位置的器件侧,以通过衬底的厚度进行蚀刻。 然后用干蚀刻工艺将半导体衬底从衬底的器件侧蚀刻到衬底的流体侧,使得在衬底中形成具有折入轮廓的一个或多个通槽。
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