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1.发明授权Apparatus for detecting undefined states of a finite state machine (FSM) and resetting the FSM upon detection 失效用于检测有限状态机（FSM）的未定义状态并在检测时复位FSM的装置
公开(公告)号：US5526486A
公开(公告)日：1996-06-11
申请号：US42856
申请日：1993-04-05
CPC分类号： G06F11/0763 , G06F11/085 , G06F11/28 , G06F7/00
摘要： A finite-state machine has combinatorial logic connected to a status memory which receives future state signals from the finite-state machine and sends current state signals to the finite-state machine. The combinatorial logic also receives and generates input and output signals which are external to the finite-state machine. The finite-state machine compares the future state signals to at least one reference level to set an error message to reset the finite-state machine for reliable computing and adjustment.
摘要翻译： 有限状态机具有连接到状态存储器的组合逻辑，其接收来自有限状态机的未来状态信号，并将当前状态信号发送到有限状态机。 组合逻辑还接收并产生在有限状态机外部的输入和输出信号。 有限状态机将未来状态信号与至少一个参考电平进行比较，以设置错误消息来重置有限状态机以进行可靠的计算和调整。
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2.发明授权Apparatus and method for producing a temperature-independent current signal in an automatic gain control circuit 失效在自动增益控制电路中产生与温度无关的电流信号的装置和方法
公开(公告)号：US5352944A
公开(公告)日：1994-10-04
申请号：US41517
申请日：1993-04-01
CPC分类号： H03G1/04 , G05F3/225 , H03G1/0023
摘要： A circuit particularly useful in AGC systems, produces an output current which is proportional to the difference between a signal voltage and a reference voltage which is practically independent of temperature. By being a function of a ratio among actual values of integrated resistances and of a ratio among substantially temperature-stable voltages. The effects of temperature dependent value of integrated resistances and of temperature-dependent electrical characteristics of integrated semiconductor devices are compensated in order to produce the desired temperature-independent output current which may usefully be utilized for implementing an automatic gain control.
摘要翻译： 在AGC系统中特别有用的电路产生与信号电压和实际上与温度无关的参考电压之间的差成比例的输出电流。 通过作为积分电阻的实际值之间的比值和基本上温度稳定的电压之间的比率的函数。 对集成电阻的温度依赖性值和集成半导体器件的温度依赖性电特性的影响进行补偿，以产生所需的温度无关输出电流，这可有效地用于实现自动增益控制。
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公开(公告)号：US5231362A
公开(公告)日：1993-07-27
申请号：US813155
申请日：1991-12-23
CPC分类号： H03K3/2821
摘要： A circuit device for phasing an oscillator, which comprises a multivibrator having a transistor pair with the emitters coupled through a capacitor, comprises a normally open electronic switch controlled by a drive signal to close and inhibit the oscillator. This switch connects a voltage divider to the base of a transistor connected to one of the emitters to interrupt the loop positive feedback of the oscillator upon the voltage across the capacitor reaching a predetermined value.
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4.发明授权Circuit structure having distributed registers with self-timed reading and writing operations 失效具有分布式寄存器的电路结构，具有自定义的读写操作
公开(公告)号：US5408436A
公开(公告)日：1995-04-18
申请号：US979960
申请日：1992-11-23
摘要： The circuit structure comprises a series of storage units, a data bus, an address bus, a line for a reading/writing signal, a precharge logic suitable for precharging the address bus with a precharge address and a precharge sensor suitable for enabling the operation of address decoders of the storage units with a given delay with respect to the end of the precharge. The structure also comprises a flip-flop for controlling the address buses and the precharge logic as well as a delay circuit capable of producing a stop-writing signal with a delay calculated on the basis of the time necessary for the writing of a datum in a storage register of the storage units.
摘要翻译： 电路结构包括一系列存储单元，数据总线，地址总线，用于读/写信号的线，适用于预充电地址总线预充电逻辑的预充电逻辑和适于使能 存储单元的地址解码器相对于预充电的结束具有给定的延迟。 该结构还包括用于控制地址总线和预充电逻辑的触发器以及延迟电路，该延迟电路能够产生具有延迟时间的停止写入信号，该延迟基于在基准的写入所需要的时间 存储单元的存储寄存器。
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公开(公告)号：US5187452A
公开(公告)日：1993-02-16
申请号：US813154
申请日：1991-12-23
CPC分类号： H03K3/017 , H03K3/2821
摘要： A control circuit for an oscillator comprising a multivibrator with transistors having their emitters connected in common and being supplied corresponding currents on respective legs, comprises a circuit structure adapted to produce on output terminals, on the one side, a current which is proportional to a reference current according to a predetermined parameter, and on the other side, a second current in turn correlated to the reference current as a function of said parameter, thereby to modify the oscillator duty cycle for a given operating frequency.
摘要翻译： 一种用于振荡器的控制电路，包括多谐振荡器，其具有晶体管，其晶体管具有共同连接的发射极，并且在相应的支路上提供相应的电流，包括适于在输出端子上产生与参考电压成比例的电流的电路结构 电流，另一方面，第二电流又作为所述参数的函数与参考电流相关，从而修改给定工作频率的振荡器占空比。
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6.发明授权
公开(公告)号：US5134481A
公开(公告)日：1992-07-28
申请号：US631915
申请日：1990-12-21
摘要： A method of automatically measuring the horizontal scan frequency of a composite synchronism signal, comprising horizontal synchronization impulses at line frequency, consists of first performing a count of a number of impulses having a repeat frequency higher than said line frequency, as intervening between two successive impulses at line frequency.The count value, corresponding to said number of impulses, is stored to obtain the line frequency of the signal, and thereafter, a series of down counts is effected, as initiated at predetermined times, until a change of frequency of the signal is detected.
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7.再颁专利Method of automatically measuring the horizontal scan frequency of a composite synchronism signal, and an electronic circuit operating in accordance with the method 失效一种自动测量复合同步信号的水平扫描频率的方法，以及根据该方法操作的电子电路
公开(公告)号：USRE36508E
公开(公告)日：2000-01-18
申请号：US932000
申请日：1997-09-17
摘要： A method of automatically measuring the horizontal scan frequency of a composite synchronism signal, comprising horizontal synchronization impulses at line frequency, consists of first performing a count of a number of impulses having a repeat frequency higher than said line frequency, as intervening between two successive impulses at line frequency.The count value, corresponding to said number of impulses, is stored to obtain the line frequency of the signal, and thereafter, a series of down counts is effected, as initiated at predetermined times, until a change of frequency of the signal is detected.
摘要翻译： 一种自动测量复合同步信号的水平扫描频率的方法，包括在线频率处的水平同步脉冲，包括首先执行具有高于所述线频率的重复频率的多个脉冲的计数，作为介于两个连续脉冲之间 在线频率。 存储对应于所述脉冲数的计数值以获得信号的线路频率，然后在预定时间开始进行一系列递减计数，直到检测到信号的频率变化。
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8.发明授权Control loop for reducing the time of repsonse of a tuner-AGC of a superheterodyne receiver and relative leading edge differentiating circuit used in the control loop 失效用于减少调谐器的响应时间的控制环路 - 超外差接收机的AGC和控制环路中使用的相对前沿微分电路
公开(公告)号：US5263186A
公开(公告)日：1993-11-16
申请号：US641147
申请日：1991-01-15
CPC分类号： H03G3/3068
摘要： In a dynamic automatic loop for control of the overall gain of an input circuit of a superheterodyne receiver, the response time of the HF-AGC circuit of the TUNER, in response to the action of the TUNER DELAY circuit activated by the IF-AGC in the case of autonomously uncontrollable abrupt increases in the level of the antenna signal from the same HF-AGC of the TUNER, is markedly reduced using an additional TUNER DELAY PLUS circuit able to absorb for a determined interval of time, a discharge current from the storage capacitor the control voltage of the HF-AGC in addition to the discharge current absorbed by the existing TUNER DELAY circuit. The relevant intensity of this additional discharge current and its duration are optimized by way of suitable circuital arrangements in the design of said TUNER DELAY PLUS circuit. The response time is reduced without modifying the time constant of the HF-AGC, which cannot be freely reduced because of inter- and cross-modulation problems.
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9.发明授权Method of demodulating multi-standard TV signals and a circuit device for implementing the method 失效解调多标准电视信号的方法和实现方法的电路装置
公开(公告)号：US5095363A
公开(公告)日：1992-03-10
申请号：US549610
申请日：1990-07-09
CPC分类号： H04N5/46
摘要： A method of demodulating multi-standard TV signals consists of providing a plurality of signals at a frequency which is a multiple of a reference frequency whose value is a common submultiple of the frequencies of the multi-standard signals. Thereafter, the signal to be demodulated is multiplied by one of said plural signals having a frequency which differs therefrom by a value equal to the reference frequency; by filtering the result of the multiplication, a signal is obtained at the reference frequency but corresponding in amplitude to the one to be demodulated.
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公开(公告)号：US5365193A
公开(公告)日：1994-11-15
申请号：US982376
申请日：1992-11-25
CPC分类号： H03F3/4508 , H03F1/223 , H03F3/45286 , H03F2203/45304 , H03F2203/45674 , H03F2203/45696
摘要： A circuit device for neutralizing thermal drift in a transconductor differential stage using a first circuit portion which corresponds structurally to the transconductor differential stage and has a pair of MOS input transistors defining a transconductance value which is substantially proportional to that of the transconductor differential stage, a pair of bipolar output transistors coupled to the MOS input transistors in a cascode configuration, and a second circuit portion being supplied a current from an output of the first differential portion to thereby output a current to be passed to the transconductor differential stage. The value of the output current is inversely proportional to temperature-dependent parameters of the transconductance.
摘要翻译： 一种电路装置，用于使用在结构上对应于跨导差分级的第一电路部分中和跨导差分级中的热漂移，并且具有一对限定跨导值的MOS输入晶体管，所述跨导值基本上与跨导差动级的导数值成正比， 一对双极性输出晶体管，其以共源共栅配置耦合到MOS输入晶体管;以及第二电路部分，从第一差分部分的输出端提供电流，从而输出要传递到跨导差分级的电流。 输出电流的值与跨导的温度相关参数成反比。
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