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公开(公告)号：US10164515B2
公开(公告)日：2018-12-25
申请号：US15891352
申请日：2018-02-07
发明人： Wei Xu , Dingkun Shen , Jianfei Zheng , Jianping Ying , Zhiming Hu , Wei Tian , Wei Xie , Lan Wei
摘要： A driving method for power semiconductor switches in an H-bridge circuit is provided. The method includes: calculating a start time and an end time of a zero level of an output voltage and determining a zero level section based on the start time and end time of the zero level; and driving an upper power semiconductor switch of a first bridge arm and an upper power semiconductor switch of a second bridge arm to be on simultaneously or driving a lower power semiconductor switch of the first bridge arm and a lower power semiconductor switch of the second bridge arm to be on simultaneously in the zero level section.
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公开(公告)号：US20170317576A1
公开(公告)日：2017-11-02
申请号：US15497714
申请日：2017-04-26
发明人： Dingkun Shen , Jianfei Zheng , Wei Xu , Jianping Ying , Lan Wei , Zhiming Hu
CPC分类号： H02M1/083 , H02M1/14 , H02M7/487 , H02M7/49 , H02M2001/0025 , H02M2007/4835
摘要： A hybrid topology power converter includes a three-level circuit module and a cascaded H-bridge circuit module. A control method includes the following steps. Firstly, a zero sequence component is injected into a total modulation wave, thereby generating a compensated total modulation wave. Then, a first voltage signal is generated according to the compensated total modulation wave. An H-bridge modulation wave is generated according to the compensated total modulation wave and the first voltage signal. A three-level driving signal is generated according to the first voltage signal, and an H-bridge driving signal is generated according to the H-bridge modulation wave. A duty cycle of at least one switch element of the three-level circuit module is adjusted according to the three-level driving signal. A duty cycle of at least one switch elements of the cascaded H-bridge circuit module is adjusted according to the H-bridge driving signal.
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公开(公告)号：US10075057B2
公开(公告)日：2018-09-11
申请号：US15497714
申请日：2017-04-26
发明人： Dingkun Shen , Jianfei Zheng , Wei Xu , Jianping Ying , Lan Wei , Zhiming Hu
CPC分类号： H02M1/083 , H02M1/14 , H02M7/487 , H02M7/49 , H02M2001/0025 , H02M2007/4835
摘要： A hybrid topology power converter includes a three-level circuit module and a cascaded H-bridge circuit module. A control method includes the following steps. Firstly, a zero sequence component is injected into a total modulation wave, thereby generating a compensated total modulation wave. Then, a first voltage signal is generated according to the compensated total modulation wave. An H-bridge modulation wave is generated according to the compensated total modulation wave and the first voltage signal. A three-level driving signal is generated according to the first voltage signal, and an H-bridge driving signal is generated according to the H-bridge modulation wave. A duty cycle of at least one switch element of the three-level circuit module is adjusted according to the three-level driving signal. A duty cycle of at least one switch elements of the cascaded H-bridge circuit module is adjusted according to the H-bridge driving signal.
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公开(公告)号：US11245341B2
公开(公告)日：2022-02-08
申请号：US16802829
申请日：2020-02-27
发明人： Jianping Ying , Wei Xie , Lan Wei , Jianfei Zheng , Bingjie Liu , Dingkun Shen , Zhiming Hu , Wei Xu , Yang Liu
摘要： A control method of a multilevel converter includes: classifying power modules that start working, need to update an output state or stop working to form m power module groups; and controlling power modules in a same one of the power module groups to start working, update the output state or stop working at the same time, and sequentially controlling the m power module groups to start working, or update the output state or stop working, according to a preset time interval. The number of power modules in each power module group is less than or equal to a preset value, causing a change value of an output level of the each power module group to be less than or equal to a preset voltage value.
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公开(公告)号：US09882502B2
公开(公告)日：2018-01-30
申请号：US15399598
申请日：2017-01-05
发明人： Wei Xie , Jianfei Zheng , Dingkun Shen , Lan Wei , Jianping Ying , Zhiming Hu , Wei Xu , Wei Tian
CPC分类号： H02M5/293 , H02M1/088 , H02M1/32 , H02M1/36 , H02M7/217 , H02M7/487 , H02M7/53871 , H02M2005/2932 , H02M2007/4835
摘要： A pre-charge control method for a hybrid multilevel power converter comprises steps of: (a) controlling access of the current-limiting resistor unit, limiting current from the AC power via the current-limiting resistor unit, and outputting the current; (b) controlling the second capacitor unit to bypass, and charging the first capacitor unit; (c) controlling the access of the second capacitor unit when the first capacitor unit is charged to a third preset voltage, and charging the first and second capacitor units at the same time; (d) controlling the first capacitor unit to bypass when the second capacitor unit is charged to a fourth preset voltage, or the first capacitor unit is charged to a first preset voltage, and charging the second capacitor unit; and (e) controlling the access of the first capacitor units and the current-limiting resistor unit to bypass when the second capacitor unit is charged to a second preset voltage.
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公开(公告)号：US20170294847A1
公开(公告)日：2017-10-12
申请号：US15399598
申请日：2017-01-05
发明人： Wei Xie , Jianfei Zheng , Dingkun Shen , Lan Wei , Jianping Ying , Zhiming Hu , Wei Xu , Wei Tian
CPC分类号： H02M5/293 , H02M1/088 , H02M1/32 , H02M1/36 , H02M7/217 , H02M7/487 , H02M7/53871 , H02M2005/2932 , H02M2007/4835
摘要： A pre-charge control method for a hybrid multilevel power converter comprises steps of: (a) controlling access of the current-limiting resistor unit, limiting current from the AC power via the current-limiting resistor unit, and outputting the current; (b) controlling the second capacitor unit to bypass, and charging the first capacitor unit; (c) controlling the access of the second capacitor unit when the first capacitor unit is charged to a third preset voltage, and charging the first and second capacitor units at the same time; (d) controlling the first capacitor unit to bypass when the second capacitor unit is charged to a fourth preset voltage, or the first capacitor unit is charged to a first preset voltage, and charging the second capacitor unit; and (e) controlling the access of the first capacitor units and the current-limiting resistor unit to bypass when the second capacitor unit is charged to a second preset voltage.
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