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公开(公告)号：US08809188B2
公开(公告)日：2014-08-19
申请号：US12885311
申请日：2010-09-17
IPC分类号： H01L21/44
CPC分类号： H01L23/528 , H01L21/76898 , H01L23/481 , H01L23/485 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating through substrate vias is disclosed. In one aspect, vias are etched from the backside of the substrate down to shallow trench isolation (STI) or the pre-metal dielectric stack (PMD). Extra contacts between metal 1 contact pads and the through-wafer vias are fabricated for realizing the contact between the through wafer vias and the back-end-of-line of the semiconductor chips.
摘要翻译： 公开了一种通过衬底通孔制造的方法。 在一个方面，通孔从衬底的背面蚀刻到浅沟槽隔离（STI）或预金属电介质叠层（PMD）。 制造金属1接触焊盘和贯通晶片通孔之间的额外接触，以实现贯穿晶片通孔和半导体芯片的后端行之间的接触。
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公开(公告)号：US20120013022A1
公开(公告)日：2012-01-19
申请号：US13183315
申请日：2011-07-14
CPC分类号： H01L21/76898 , H01L21/7682 , H01L23/481 , H01L2224/0401 , H01L2224/05 , H01L2224/13025 , H01L2224/131 , H01L2924/12044 , H01L2924/1461 , H01L2924/014 , H01L2924/00
摘要： Ultra-low capacitance interconnect structures, preferably Through Silicon Via (TSV) interconnects and methods for fabricating said interconnects are disclosed. The fabrication method comprises the steps of providing a substrate having a first main surface, producing at least one hollow trench-like structure therein from the first main surface, said trench-like structure surrounding an inner pillar structure of substrate material, depositing a dielectric liner which pinches off said hollow trench-like structure at the first main surface such that an airgap is created in the center of hollow trench-like structure and further creating a TSV hole and filling it at least partly with conductive material.
摘要翻译： 公开了超低电容互连结构，优选地通过硅通孔（TSV）互连和用于制造所述互连的方法。 该制造方法包括以下步骤：提供具有第一主表面的基底，从第一主表面至少产生一个中空的沟槽状结构，所述沟槽状结构围绕基底材料的内柱结构，沉积介电衬垫 其在第一主表面处夹紧所述中空沟槽状结构，使得在中空沟槽状结构的中心产生气隙，并进一步产生TSV孔并至少部分地用导电材料填充TSV孔。
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公开(公告)号：US08647920B2
公开(公告)日：2014-02-11
申请号：US13183315
申请日：2011-07-14
IPC分类号： H01L21/00 , H01L21/4763 , H01L21/44 , H01L21/302 , H01L21/461 , H01L29/06 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76898 , H01L21/7682 , H01L23/481 , H01L2224/0401 , H01L2224/05 , H01L2224/13025 , H01L2224/131 , H01L2924/12044 , H01L2924/1461 , H01L2924/014 , H01L2924/00
摘要： Ultra-low capacitance interconnect structures, preferably Through Silicon Via (TSV) interconnects and methods for fabricating said interconnects are disclosed. The fabrication method comprises the steps of providing a substrate having a first main surface, producing at least one hollow trench-like structure therein from the first main surface, said trench-like structure surrounding an inner pillar structure of substrate material, depositing a dielectric liner which pinches off said hollow trench-like structure at the first main surface such that an airgap is created in the center of hollow trench-like structure and further creating a TSV hole and filling it at least partly with conductive material.
摘要翻译： 公开了超低电容互连结构，优选地通过硅通孔（TSV）互连和用于制造所述互连的方法。 该制造方法包括以下步骤：提供具有第一主表面的基底，从第一主表面至少产生一个中空的沟槽状结构，所述沟槽状结构围绕基底材料的内柱结构，沉积介电衬垫 其在第一主表面处夹紧所述中空沟槽状结构，使得在中空沟槽状结构的中心产生气隙，并进一步产生TSV孔并至少部分地用导电材料填充TSV孔。
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公开(公告)号：US20110089572A1
公开(公告)日：2011-04-21
申请号：US12885311
申请日：2010-09-17
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/528 , H01L21/76898 , H01L23/481 , H01L23/485 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating through substrate vias is disclosed. In one aspect, vias are etched from the backside of the substrate down to shallow trench isolation (STI) or the pre-metal dielectric stack (PMD). Extra contacts between metal 1 contact pads and the through-wafer vias are fabricated for realizing the contact between the through wafer vias and the back-end-of-line of the semiconductor chips.
摘要翻译： 公开了一种通过衬底通孔制造的方法。 在一个方面，通孔从衬底的背面蚀刻到浅沟槽隔离（STI）或预金属电介质叠层（PMD）。 制造金属1接触焊盘和贯通晶片通孔之间的额外接触，以实现贯穿晶片通孔和半导体芯片的后端行之间的接触。
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