利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

5 条记录 (耗时 0.02 秒)

    METHOD FOR FORMING 3D-INTERCONNECT STRUCTURES WITH AIRGAPS
    3.
    发明申请
    METHOD FOR FORMING 3D-INTERCONNECT STRUCTURES WITH AIRGAPS 有权
    用于形成3D互连结构的方法

    公开(公告)号：US20120013022A1

    公开(公告)日：2012-01-19

    申请号：US13183315

    申请日：2011-07-14

    申请人： Deniz Sabuncuoglu Tezcan ,  Yann Civale ,  Eric Beyne

    发明人： Deniz Sabuncuoglu Tezcan ,  Yann Civale ,  Eric Beyne

    IPC分类号： H01L23/48 ,  H01L21/28

    CPC分类号： H01L21/76898 ,  H01L21/7682 ,  H01L23/481 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2924/12044 ,  H01L2924/1461 ,  H01L2924/014 ,  H01L2924/00

    摘要： Ultra-low capacitance interconnect structures, preferably Through Silicon Via (TSV) interconnects and methods for fabricating said interconnects are disclosed. The fabrication method comprises the steps of providing a substrate having a first main surface, producing at least one hollow trench-like structure therein from the first main surface, said trench-like structure surrounding an inner pillar structure of substrate material, depositing a dielectric liner which pinches off said hollow trench-like structure at the first main surface such that an airgap is created in the center of hollow trench-like structure and further creating a TSV hole and filling it at least partly with conductive material.

    摘要翻译： 公开了超低电容互连结构，优选地通过硅通孔（TSV）互连和用于制造所述互连的方法。 该制造方法包括以下步骤：提供具有第一主表面的基底，从第一主表面至少产生一个中空的沟槽状结构，所述沟槽状结构围绕基底材料的内柱结构，沉积介电衬垫 其在第一主表面处夹紧所述中空沟槽状结构，使得在中空沟槽状结构的中心产生气隙，并进一步产生TSV孔并至少部分地用导电材料填充TSV孔。

    METHOD FOR PRODUCING ELECTRICAL INTERCONNECTS AND DEVICES MADE THEREOF
    5.
    发明申请
    METHOD FOR PRODUCING ELECTRICAL INTERCONNECTS AND DEVICES MADE THEREOF 审中-公开
    用于生产电气互连的方法及其装置

    公开(公告)号：US20100264538A1

    公开(公告)日：2010-10-21

    申请号：US12760468

    申请日：2010-04-14

    申请人： Bart Swinnen ,  Philippe Soussan ,  Deniz Sabuncuoglu Tezcan ,  Piet De Moor

    发明人： Bart Swinnen ,  Philippe Soussan ,  Deniz Sabuncuoglu Tezcan ,  Piet De Moor

    IPC分类号： H01L23/488 ,  H01L21/60

    CPC分类号： H01L21/76898 ,  H01L21/76831 ,  H01L23/481

    摘要： A method for the fabrication of electrical interconnects in a substrate is disclosed. In one aspect, the method includes providing a substrate having a first main surface. The method may further include producing a ring structure in the substrate from the first main surface, which surrounds an inner pillar structure and has a bottom surface. The method may further include filling the ring structure with a dielectric material. The method may further include providing a conductive inner pillar structure, thereby forming an interconnect structure, which forms an electrical path from the bottom surface up until the first main surface. This conductive inner pillar structure can for example be provided by removing the inner pillar structure leaving a pillar vacancy and partially filling the vacancy with a conductive material. The dielectric material may be applied in liquid phase.

    摘要翻译： 公开了一种在衬底中制造电互连的方法。 一方面，该方法包括提供具有第一主表面的基底。 该方法还可以包括从第一主表面在衬底中产生环结构，其围绕内柱结构并具有底表面。 该方法还可以包括用介电材料填充环结构。 该方法还可以包括提供导电内柱结构，从而形成互连结构，其形成从底表面直到第一主表面的电路径。 该导电内柱结构例如可以通过去除留下柱空位的内柱结构并用导电材料部分填充空位来提供。 电介质材料可以以液相的形式施加。