公开(公告)号：US08333842B2

公开(公告)日：2012-12-18

申请号：US12121599

申请日：2008-05-15

申请人： Dmitry Lubomirsky ,  Tien Fak Tan ,  Lun Tsuei

发明人： Dmitry Lubomirsky ,  Tien Fak Tan ,  Lun Tsuei

IPC分类号： H01L21/3065

CPC分类号： H01L21/67126 ,  H01L21/6838 ,  Y10T279/23

摘要： A wafer pedestal of a semiconductor apparatus is provided. The wafer pedestal is capable of supporting a substrate. The wafer pedestal includes a pedestal having at least one purge opening configured to flow a purge gas and at least one chucking opening configured to chuck the substrate over the pedestal. The pedestal includes a sealing band disposed between the at least one purge opening and the at least one chucking opening. The sealing band is configured to support the substrate.

摘要翻译： 提供半导体装置的晶片基座。 晶片基座能够支撑基板。 晶片基座包括具有至少一个净化开口的基座，该至少一个净化开口构造成流过净化气体;以及至少一个夹紧开口，其构造成将衬底夹在基座上。 基座包括设置在至少一个吹扫开口和至少一个夹紧开口之间的密封带。 密封带构造成支撑基底。

公开(公告)号：US20090283217A1

公开(公告)日：2009-11-19

申请号：US12121599

申请日：2008-05-15

申请人： DMITRY LUBOMIRSKY ,  Tien Fak Tan ,  Lun Tsuei

发明人： DMITRY LUBOMIRSKY ,  Tien Fak Tan ,  Lun Tsuei

IPC分类号： H01L21/3065

CPC分类号： H01L21/67126 ,  H01L21/6838 ,  Y10T279/23

摘要： A wafer pedestal of a semiconductor apparatus is provided. The wafer pedestal is capable of supporting a substrate. The wafer pedestal includes a pedestal having at least one purge opening configured to flow a purge gas and at least one chucking opening configured to chuck the substrate over the pedestal. The pedestal includes a sealing band disposed between the at least one purge opening and the at least one chucking opening. The sealing band is configured to support the substrate.

摘要翻译： 提供半导体装置的晶片基座。 晶片基座能够支撑基板。 晶片基座包括具有至少一个净化开口的基座，该至少一个净化开口构造成流过净化气体;以及至少一个夹紧开口，其构造成将基板夹在基座上。 基座包括设置在至少一个吹扫开口和至少一个夹紧开口之间的密封带。 密封带构造成支撑基底。

公开(公告)号：US20120074126A1

公开(公告)日：2012-03-29

申请号：US13072546

申请日：2011-03-25

申请人： Won B. Bang ,  Tien Fak Tan ,  Son M. Phi ,  Dmitry Lubomirsky

发明人： Won B. Bang ,  Tien Fak Tan ,  Son M. Phi ,  Dmitry Lubomirsky

IPC分类号： H05B3/68

CPC分类号： H01L21/68785 ,  H01L21/67109

摘要： A substrate support comprising a top ceramic plate providing a substrate support surface for supporting a substrate during substrate processing, a substrate pedestal having coolant channels formed therein and a thermoelectric deck sandwiched between the top ceramic plate and substrate pedestal. The thermoelectric deck includes a plurality of embedded thermoelectric elements that can either heat or cool the substrate support surface.

摘要翻译： 一种衬底支撑件，包括顶部陶瓷板，其提供用于在衬底处理期间支撑衬底的衬底支撑表面，其中形成有冷却剂通道的衬底基座和夹在顶部陶瓷板和衬底基座之间的热电板。 热电甲板包括可以加热或冷却基板支撑表面的多个嵌入式热电元件。

公开(公告)号：US20120285621A1

公开(公告)日：2012-11-15

申请号：US13112179

申请日：2011-05-20

申请人： Tien Fak Tan

发明人： Tien Fak Tan

IPC分类号： H01L21/3065

CPC分类号： H01L21/31116 ,  H01J37/32357 ,  H01J37/32724 ,  H01L21/67069 ,  H01L21/67109 ,  H01L21/6719

摘要： Systems and chambers for processing dielectric films on substrates are described. Vertical combo chambers include two separate processing chambers vertically arranged in a processing stack. A top processing chamber is configured to process the substrate at relatively low substrate temperature. A robot is configured to remove a substrate from the top processing chamber and change height before placing the substrate in a bottom processing chamber. The bottom processing chamber is configured to anneal the substrate to further process the dielectric film. The vertical stacking increases the number of processing chambers which can be included on a single processing system. The separation of the bottom (annealing or curing) chamber and the top chamber allows the top chamber to remain at a low temperature which hastens the start of a process conducted on a new wafer transferred into the top chamber. This configuration of vertical-combo chamber can be used for depositing a dielectric film in the top chamber and then curing the film in the bottom chamber. The configuration is also helpful for dielectric removal processes which create solid residue, in which case the bottom chamber is used to sublimate the solid residue. The separation limits or substantially eliminates the amount of solid residue which accumulates in the top chamber. Simultaneous processing, thermal separation and contamination control afforded by the design of the vertical combo chambers improve the throughput of a processing system.

摘要翻译： 描述了用于在基板上处理电介质膜的系统和室。 垂直组合室包括垂直设置在处理堆中的两个独立的处理室。 顶部处理室被配置为在相对较低的衬底温度下处理衬底。 机器人构造成在将基板放置在底部处理室中之前从顶部处理室移除基板并改变高度。 底部处理室被配置为使基板退火以进一步处理介电膜。 垂直堆叠增加了可以包含在单个处理系统中的处理室的数量。 底部（退火或固化）腔室和顶部腔室的分离允许顶部腔室保持在低温度，这加速了在转移到顶部腔室中的新晶片上进行的过程的开始。 垂直组合室的这种配置可用于在顶部室中沉积电介质膜，然后使底部室中的膜固化。 该配置还有助于产生固体残余物的电介质去除方法，在这种情况下，底室用于升华固体残余物。 分离极限或基本上消除了积聚在顶部室中的固体残余物的量。 通过垂直组合室的设计提供的同时处理，热分离和污染控制提高了处理系统的吞吐量。