Process for the production of polyarenazole polymer
    2.
    发明申请
    Process for the production of polyarenazole polymer 有权
    聚赖氨酸聚合物生产工艺

    公开(公告)号:US20060287475A1

    公开(公告)日:2006-12-21

    申请号:US11390898

    申请日:2006-03-27

    IPC分类号: C08G63/02

    摘要: The present invention concerns a process for making a polyareneazole polymer comprising the steps of: a) contacting azole-forming monomers, metal powder, and optionally P2O5, in polyphosphoric acid to form a mixture; b) blending the mixture at a temperature of from about 50° C. to about 110° C.; c) further blending the mixture at a temperature of up to about 145° C. to form a solution comprising an oligomer; d) optionally, degassing the solution; and e) reacting the oligomer solution at a temperature of about 160° C. to about 250° C. for a time sufficient to form a polymer.

    摘要翻译: 本发明涉及一种制备聚azole唑聚合物的方法,包括以下步骤:a)使形成吡咯的单体,金属粉末和任选的P 2 O 5 O 5在多磷酸 酸形成混合物; b)在约50℃至约110℃的温度下混合该混合物; c)在高达约145℃的温度下进一步混合该混合物以形成包含低聚物的溶液; d)任选地,使溶液脱气; 和e)在约160℃至约250℃的温度下使所述低聚物溶液反应足以形成聚合物的时间。

    Processes for preparing high inherent viscosity polyareneazoles using metal powders
    4.
    发明申请
    Processes for preparing high inherent viscosity polyareneazoles using metal powders 失效
    使用金属粉末制备高特性粘度聚芳唑的方法

    公开(公告)号:US20070010654A1

    公开(公告)日:2007-01-11

    申请号:US11390849

    申请日:2006-03-27

    IPC分类号: C08G73/00

    CPC分类号: C08G73/18 C08G73/22

    摘要: Disclosed are processes for preparing polyareneazole polymers that include contacting, in polyphosphoric acid, azole-forming monomers and metal powder, the metal powder added in an amount of from about 0.05 to about 0.9 weight percent, based on the total weight of the azole-forming monomers, and reacting the azole-forming monomers to form the polyareneazole polymers. Polyareneazoles, filaments and yarns are also disclosed.

    摘要翻译: 公开了制备聚are唑聚合物的方法,其包括在多磷酸中形成吡唑形成单体和金属粉末,金属粉末的添加量为基于吡唑形成的总重量的约0.05至约0.9重量% 单体,并使形成唑的单体反应形成聚芳腈聚合物。 还公开了聚芳ne唑,长丝和纱线。

    DRIVER CIRCUIT FOR SOLID STATE LIGHT SOURCES
    8.
    发明申请
    DRIVER CIRCUIT FOR SOLID STATE LIGHT SOURCES 有权
    用于固态光源的驱动电路

    公开(公告)号:US20130307422A1

    公开(公告)日:2013-11-21

    申请号:US13471650

    申请日:2012-05-15

    IPC分类号: H05B37/02

    摘要: A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.

    摘要翻译: 提供一种用于包括一个或多个固态光源的光源的驱动器电路,包括该固态光源的照明器以及驱动固态光源的方法。 驱动器电路包括一个整流电路,其接收交流(AC)输入电压并提供整流的交流电压。 驱动器电路还包括耦合到光源的开关转换器电路。 开关转换器电路响应于整流的AC电压向光源提供直流(DC)输出。 驱动器电路还包括耦合到光源的混合电路,以响应于整流的AC电压的多个连续半波中的每一个来切换电流通过光源的至少一个固态光源。

    OPTIMIZED REFERENCE VOLTAGE GENERATION USING SWITCHED CAPACITOR SCALING FOR DATA CONVERTERS
    9.
    发明申请
    OPTIMIZED REFERENCE VOLTAGE GENERATION USING SWITCHED CAPACITOR SCALING FOR DATA CONVERTERS 失效
    使用切换电容器优化数据转换器的优化参考电压发生器

    公开(公告)号:US20050219097A1

    公开(公告)日:2005-10-06

    申请号:US10804453

    申请日:2004-03-19

    IPC分类号: H03M1/12 H03M1/16 H03M1/66

    CPC分类号: H03M1/162

    摘要: An algorithmic or cyclic data converter uses an RSD stage having a switched capacitor network for efficiently scaling at least one externally supplied reference voltage. A reference voltage is scaled by using capacitor ratios that also function to provide an output voltage used as a residue output of the RSD A/D converter. The residue is used to generate a bit value corresponding to the magnitude of the residue. Two RSD stages cycle back and forth generating a logic value each half clock cycle until the desired bit resolution is achieved. In one form, the RSD stage scales the externally supplied reference voltage only by factors of less than one. In another form, the RSD stage scales the reference voltage by any scaling factor. A reference voltage scaling circuit separate from the RSD stage is avoided.

    摘要翻译: 算法或循环数据转换器使用具有开关电容器网络的RSD级,用于有效地缩放至少一个外部提供的参考电压。 通过使用电容比例来缩放参考电压,该比率也用作提供用作RSD A / D转换器的残留输出的输出电压。 残留物用于产生对应于残基大小的位值。 两个RSD阶段来回循环,每半个时钟周期产生一个逻辑值,直到达到所需的位分辨率。 在一种形式中,RSD级仅通过小于1的因子来缩放外部提供的参考电压。 在另一种形式中,RSD级通过任何缩放因子来缩放参考电压。 避免了与RSD级分离的参考电压缩放电路。