摘要:
An apparatus for driving a liquid crystal display includes a data driver alternately applying first data voltages and second voltages to pixels for a horizontal period and a signal controller changing a state of an inversion signal between an end of the transmission of first image data corresponding to the first data voltages and a start of the transmission of second image data corresponding the second data voltages and the polarity of the common voltage between an end of the application of the data voltages for a row and a start of the application of the data voltages for a next row.
摘要:
A reduced power thin-film transistor (TFT) array substrate includes a display section, a peripheral section, a driving circuit section and a driver chip. The display section includes a high definition section and a low definition section. The peripheral section surrounds the display section. The driving circuit section is formed on the peripheral section and is configured to provide the high definition section with a plurality of first gate signals. The driver chip is mounted on the peripheral section to provide the low definition section with a plurality of second gate signals.
摘要:
In a driving unit and a display apparatus, a master driving chip includes a common voltage generator configured to receive power and generate a master common voltage and a slave common voltage and a first data driver configured to output a master image signal based on the master common voltage and a master data signal. A slave driving chip includes a second data driver configured to output a slave image signal based on the slave common voltage from the common voltage generator and a slave data signal. Accordingly, the malfunction of the driving unit and the display apparatus may be prevented.
摘要:
A reduced power thin-film transistor (TFT) array substrate includes a display section, a peripheral section, a driving circuit section and a driver chip. The display section includes a high definition section and a low definition section. The peripheral section surrounds the display section. The driving circuit section is formed on the peripheral section and is configured to provide the high definition section with a plurality of first gate signals. The driver chip is mounted on the peripheral section to provide the low definition section with a plurality of second gate signals.
摘要:
A liquid crystal display may include: a panel assembly provided with a plurality of pixels connected to gate lines and data lines; a signal controller generating a plurality of output control signals on the basis of image data and input control signals from an external MPU; a gate drive circuit generating gate signals for application to the gate lines; a memory performing writing and reading operations in response to predetermined control signals and synchronization signals, wherein the panel assembly comprises a normal mode and a rotated mode, and wherein the number of writing operations is smaller than the number of reading operations and last-inputted data are outputted first when the panel assembly is in the rotated mode.
摘要:
A display device includes a first panel unit, a first driving chip driving the first panel unit, a second panel unit, and a second driving chip driving the second panel unit, wherein the first and second driving chips share at least a portion of a plurality of power supply voltages required for driving the first panel unit and the second panel unit.
摘要:
A resonant inverter includes a first driver and a second driver for driving a first and second switching devices, respectively, a dead time generator for generating a first drive signal and a second drive signal respectively, a current-controlled oscillator for supplying, to the dead time generator, an output clock having a frequency determined based on a first current input to the current-controlled oscillator, and a current mirror for supplying the first current to the current-controlled oscillator in an amount proportional to a second current flowing through an external resistor. The current mirror includes a track/hold circuit, to supply the second current in an amount equal to an amount of the second current supplied before a variation in the amount of the second current, during a transition of an output signal between the first and second switching devices.
摘要:
A method of manufacturing a nonvolatile memory device includes forming a plurality of device isolation regions in a semiconductor substrate, forming a tunneling insulation layer on the semiconductor substrate, forming a first preliminary polysilicon layer in communication with the tunneling insulation layer and the device isolation regions, forming a preliminary amorphous silicon layer on the first preliminary silicon layer, forming a second preliminary polysilicon layer on the preliminary amorphous silicon layer, and patterning the second preliminary polysilicon layer, the preliminary amorphous silicon layer, and the first preliminary polysilicon layer to form a floating gate layer.
摘要:
A logic circuit for high-side gate driver includes a p-MOSFET array connected to a first voltage source, an n-MOSFET array connected to a second voltage source, and a resistor arranged between the p-MOSFET array and the n-MOSFET array, wherein a first node between the resistor and at least one of the p-MOSFETs in the p-MOSFET array is connected to a first output terminal, and a second node between the resistor and at least one of the n-MOSFETs in the n-MOSFET array is connected to a second output terminal. An additional logic circuit can include a second p-MOSFET array, a second n-MOSFET array, and a second resistor between the second p-MOSFET array and the second n-MOSFET array, where an output signal from an output terminal between the first resistor and the first n-MOSFET array is fed back to the second p-MOSFET array and the second n-MOSFET array, and an output signal from an output terminal between the second resistor and the second n-MOSFET array is fed back to the first p-MOSFET array and the first n-MOSFET array.
摘要:
A clock driver is provided. A first driving unit is configured with a plurality of drivers and receives a first clock signal to drive a first pumping clock. A second driving unit is configured with a plurality of drivers and receives a second clock signal to drive a second pumping clock. A charge recycling switch is connected between an output terminal of the first driving unit and an output terminal of the second driving unit. A switch controller selectively transfers an input clock signal of the first or second driving unit to the charge recycling switch in response to the first and second pumping clock signals.