公开(公告)号：US20140281634A1

公开(公告)日：2014-09-18

申请号：US14211987

申请日：2014-03-14

申请人： EFRAIM ROTEM ,  BENJAMIN J. GOULD ,  JAMES G. HERMERDING, II ,  JORGE P. RODRIGUEZ ,  ALON NAVEH ,  NIR ROSENZWEIG ,  VIJAY S. R. DEGALAHAL

发明人： EFRAIM ROTEM ,  BENJAMIN J. GOULD ,  JAMES G. HERMERDING, II ,  JORGE P. RODRIGUEZ ,  ALON NAVEH ,  NIR ROSENZWEIG ,  VIJAY S. R. DEGALAHAL

IPC分类号： G06F1/32

CPC分类号： G06F1/325 ,  G06F1/3206 ,  Y02D50/20

摘要： Methods and apparatus relating to controlling power consumption by a Power Supply Unit (PSU) during idle state are described. In one embodiment, a power supply unit enters a lower power consumption state (e.g. S9) based on power state information, corresponding to one or more components of the platform, and comparison of a first value (corresponding to a frequency/frequentness of entry into the lower power consumption state) to a first threshold value. Other embodiments are also disclosed and claimed.

摘要翻译： 描述了在空闲状态期间由电源单元（PSU）控制功率消耗的方法和装置。 在一个实施例中，电源单元基于对应于平台的一个或多个组件的功率状态信息进入较低功耗状态（例如S9），并且将第一值（对应于进入的频率/频率 较低功耗状态）变为第一阈值。 还公开并要求保护其他实施例。

公开(公告)号：US20160239068A1

公开(公告)日：2016-08-18

申请号：US14623764

申请日：2015-02-17

申请人： ANKUSH VARMA ,  KRISHNAKANTH V. SISTLA ,  VASUDEVAN SRINIVASAN ,  EUGENE GORBATOV ,  ANDREW D. HENROID ,  BARNES COOPER ,  DAVID W. BROWNING ,  GUY M. THERIEN ,  NEIL W. SONGER ,  JAMES G. HERMERDING, II

发明人： ANKUSH VARMA ,  KRISHNAKANTH V. SISTLA ,  VASUDEVAN SRINIVASAN ,  EUGENE GORBATOV ,  ANDREW D. HENROID ,  BARNES COOPER ,  DAVID W. BROWNING ,  GUY M. THERIEN ,  NEIL W. SONGER ,  JAMES G. HERMERDING, II

IPC分类号： G06F1/32

CPC分类号： G06F1/3206 ,  G06F1/3203 ,  G06F1/3287 ,  G06F9/50 ,  Y02B70/126 ,  Y02D10/171

摘要： In one embodiment, a processor includes at least one core to execute instructions and a power control logic to receive power capability information from a plurality of devices to couple to the processor and allocate a platform power budget to the devices, set a first power level for the devices at which the corresponding device is allocated to be powered, communicate the first power level to the devices, and dynamically reduce a first power to be allocated to a first device and increase a second power to be allocated to a second device responsive to a request from the second device for a higher power level. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，处理器包括执行指令的至少一个核心和用于从多个设备接收功率能力信息的功率控制逻辑以耦合到处理器并且向设备分配平台功率预算，为 分配相应设备被供电的设备将第一功率电平传送到设备，并且动态地减少要分配给第一设备的第一功率并且增加要分配给第二设备的第二功率，以响应于 来自第二设备的更高功率电平的请求。 描述和要求保护其他实施例。

公开(公告)号：US20160216754A1

公开(公告)日：2016-07-28

申请号：US15089350

申请日：2016-04-01

申请人： ERIC DISTEFANO ,  GUY M. THERIEN ,  VASUDEVAN SRINIVASAN ,  TAWFIK M. RAHAL-ARABI ,  VENKATESH RAMANI ,  RYAN D. WELLS ,  STEPHEN H. GUNTHER ,  JEREMY J. SHRALL ,  JAMES G. HERMERDING, II

发明人： ERIC DISTEFANO ,  GUY M. THERIEN ,  VASUDEVAN SRINIVASAN ,  TAWFIK M. RAHAL-ARABI ,  VENKATESH RAMANI ,  RYAN D. WELLS ,  STEPHEN H. GUNTHER ,  JEREMY J. SHRALL ,  JAMES G. HERMERDING, II

IPC分类号： G06F1/32

CPC分类号： G06F1/3234 ,  G06F1/206 ,  G06F1/26 ,  Y02D10/16

摘要： A technique to change a thermal design power (TDP) value. In one embodiment, one or more environmental or user-driven changes may cause a processor's TDP value to be changed. Furthermore, in some embodiments a change in TDP may alter a turbo mode target frequency.