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公开(公告)号：US20160239068A1
公开(公告)日：2016-08-18
申请号：US14623764
申请日：2015-02-17
申请人： ANKUSH VARMA , KRISHNAKANTH V. SISTLA , VASUDEVAN SRINIVASAN , EUGENE GORBATOV , ANDREW D. HENROID , BARNES COOPER , DAVID W. BROWNING , GUY M. THERIEN , NEIL W. SONGER , JAMES G. HERMERDING, II
发明人： ANKUSH VARMA , KRISHNAKANTH V. SISTLA , VASUDEVAN SRINIVASAN , EUGENE GORBATOV , ANDREW D. HENROID , BARNES COOPER , DAVID W. BROWNING , GUY M. THERIEN , NEIL W. SONGER , JAMES G. HERMERDING, II
IPC分类号： G06F1/32
CPC分类号： G06F1/3206 , G06F1/3203 , G06F1/3287 , G06F9/50 , Y02B70/126 , Y02D10/171
摘要： In one embodiment, a processor includes at least one core to execute instructions and a power control logic to receive power capability information from a plurality of devices to couple to the processor and allocate a platform power budget to the devices, set a first power level for the devices at which the corresponding device is allocated to be powered, communicate the first power level to the devices, and dynamically reduce a first power to be allocated to a first device and increase a second power to be allocated to a second device responsive to a request from the second device for a higher power level. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，处理器包括执行指令的至少一个核心和用于从多个设备接收功率能力信息的功率控制逻辑以耦合到处理器并且向设备分配平台功率预算，为 分配相应设备被供电的设备将第一功率电平传送到设备，并且动态地减少要分配给第一设备的第一功率并且增加要分配给第二设备的第二功率，以响应于 来自第二设备的更高功率电平的请求。 描述和要求保护其他实施例。
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公开(公告)号：US20140189398A1
公开(公告)日：2014-07-03
申请号：US13728335
申请日：2012-12-27
IPC分类号： G06F1/32
CPC分类号： G06F1/206 , G06F1/3203 , G06F1/324 , Y02D10/126 , Y02D10/16 , Y02D50/20
摘要： Various embodiments are generally directed to an apparatus, method and other techniques for detecting active and semi-active workloads during execution on a platform processing device and enabling a duty cycle process to reduce thermal output and power consumption, and align unaligned activity. In various embodiments, the duty cycle processing may be enabled during an active workload when thermal output or power consumption is above a thermal threshold or power consumption threshold that is below an efficient operating point for the platform processing device. The duty cycle processing may also be enabled during semi-active workloads when the workload causes the platform processing device to be underutilized and unaligned. The duty cycle processing may comprise enabling a forced idle period for the platform processing device. Other embodiments are described and claimed.
摘要翻译： 各种实施例通常涉及用于在平台处理设备上的执行期间检测活动和半主动工作负载的装置，方法和其他技术，并且实现占空比过程以减少热输出和功率消耗，并且调整未对齐的活动。 在各种实施例中，当热输出或功率消耗高于低于用于平台处理设备的有效工作点的热阈值或功率消耗阈值时，可以在活动工作负载期间启用占空比处理。 当工作负载导致平台处理设备未充分利用和未对齐时，也可以在半主动工作负载期间启用占空比处理。 占空比处理可以包括为平台处理装置启用强制空闲周期。 描述和要求保护其他实施例。
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公开(公告)号：US20140380019A1
公开(公告)日：2014-12-25
申请号：US13924334
申请日：2013-06-21
IPC分类号： G06F9/38
CPC分类号： G06F9/3836 , G06F9/5077 , G06F2209/507 , Y02D10/22 , Y02D10/36
摘要： Systems and methods for managing reconfigurable processor cores. An example processing system comprises a plurality of processor cores; a control register including a plurality of state bits, each state bit indicating a state of a corresponding processor core, the control register further including a plurality of inhibit bits, each inhibit bit indicating whether a corresponding processor core is allowed to merge with other processor cores; and a core management logic configured to merge a first processor core and a second processor core, responsive to determining that a first state bit corresponding to the first processor core is set, a first inhibit bit corresponding to the first processor core is cleared, a second state bit corresponding to the second processor core is cleared, and a second inhibit bit corresponding to the second processor core is cleared.
摘要翻译： 管理可重构处理器内核的系统和方法。 一个示例性处理系统包括多个处理器核心; 包括多个状态位的控制寄存器，每个状态位指示对应的处理器核心的状态，所述控制寄存器还包括多个禁止位，每个禁止位指示相应的处理器核心是否被允许与其他处理器核心合并 ; 以及核心管理逻辑，用于响应于确定与所述第一处理器核相对应的第一状态位被设置来合并第一处理器核和第二处理器核，清除与所述第一处理器核相对应的第一禁止位， 对应于第二处理器核的状态位被清除，并且与第二处理器核相对应的第二禁止位被清除。
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