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Patent Agency Ranking
公开(公告)号：US10663974B2
公开(公告)日：2020-05-26
申请号：US15804992
申请日：2017-11-06
Inventor： Jung Hee Suk , Yi-Gyeong Kim , Chun-Gi Lyuh , Young-Deuk Jeon , Min-Hyung Cho
Abstract: Provided are an object recognition device, an autonomous driving system including the same, and an object recognition method using the object recognition device. The object recognition device includes an object frame information generation unit, a frame analysis unit, an object priority calculator, a frame complexity calculator, and a mode control unit. The object frame information generation unit generates object frame information based on a mode control signal. The frame analysis unit generates object tracking information based on object frame information. The object priority calculator generates based on object tracking information. The frame complexity calculator generates a frame complexity based on object tracking information. The mode control unit generates a mode control signal for adjusting an object recognition range and a calculation amount of the object frame information generation unit based on the priority information, the frame complexity, and the resource occupation state.
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公开(公告)号：US12206420B2
公开(公告)日：2025-01-21
申请号：US18223101
申请日：2023-07-18
Inventor： Yi-Gyeong Kim , Young-Su Kwon , Su-Jin Park , Young-Deuk Jeon , Min-Hyung Cho , Jae-Woong Choi
Abstract: Disclosed herein are a duty cycle monitoring method and apparatus for a memory interface, including receiving a clock signal as input and generating a first delay time offset and a second delay time offset, receiving the clock signal and the first delay time offset and then outputting a first delayed signal, receiving the first delayed signal and the second delay time offset and then outputting a second delayed signal, receiving the clock signal and the second delayed signal and then outputting a delay value corresponding to a half-period of the clock signal, and monitoring, based on the first delayed signal, whether a duty cycle of the clock signal conforms to a duty cycle specification.
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公开(公告)号：US12087392B2
公开(公告)日：2024-09-10
申请号：US17565937
申请日：2021-12-30
Inventor： Young-Deuk Jeon , Min-Hyung Cho , Young-Su Kwon , Jin Ho Han
CPC classification number: G11C7/1084 , G11C7/1057 , G11C7/225 , G11C8/18
Abstract: Provided is a memory interface device. A memory interface device, comprising: a DQS input buffer configured to receive input data strobe signals and output a first intermediate data strobe signal, the DQS input buffer providing a static offset; an offset control circuit configured to receive the first intermediate data strobe signal and output a second intermediate data strobe signal; and a duty adjustment buffer configured to receive the second intermediate data strobe signal and output a clean data strobe signal, wherein the offset control circuit provides a dynamic offset using the clean data strobe signal.
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公开(公告)号：US10154225B2
公开(公告)日：2018-12-11
申请号：US15653358
申请日：2017-07-18
Inventor： Chun-Gi Lyuh , Yi-Gyeong Kim , Jung Hee Suk , Young-Deuk Jeon , Min-Hyung Cho
Abstract: The present disclosure relates to a frame grabber, an image processing system, and an image processing method. A frame grabber according to an embodiment of the inventive concept includes a plurality of decoders, a plurality of image controllers, a plurality of memories, a synchronization controller, and a synchronization memory. The plurality of decoders generate a plurality of image data by decoding a plurality of image signals. The plurality of image controllers generate a plurality of pixel data and a plurality of frame information data on the basis of the plurality of image data. The plurality of memories store the plurality of pixel data. The synchronization controller receives the plurality of frame information data, and generates synchronization data on the basis of the plurality of frame information data. The synchronization memory stores the frame information data and the synchronization data.
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公开(公告)号：US12231100B2
公开(公告)日：2025-02-18
申请号：US17903112
申请日：2022-09-06
Inventor： Yi-Gyeong Kim , Young-Deuk Jeon , Young-Su Kwon , Jin-Ho Han
Abstract: An apparatus for receiving a strobe signal may include an amplifier for amplifying a strobe signal input thereto, an offset generator for controlling the setting of a threshold for detecting a preamble signal by generating an offset for the amplifier, and a preamble detector for detecting a first preamble signal occurring at a point at which the amplified strobe signal is equal to or greater than the threshold and turning off the offset generator when the first preamble signal is detected.
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