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公开(公告)号:US06674168B1
公开(公告)日:2004-01-06
申请号:US10248452
申请日:2003-01-21
申请人: Edward C. Cooney, III , Robert M Geffken , Vincent J McGahay , William T. Motsiff , Mark P. Murray , Amanda L. Piper , Anthony K. Stamper , David C. Thomas , Christy S. Tyberg , Elizabeth T. Webster
发明人: Edward C. Cooney, III , Robert M Geffken , Vincent J McGahay , William T. Motsiff , Mark P. Murray , Amanda L. Piper , Anthony K. Stamper , David C. Thomas , Christy S. Tyberg , Elizabeth T. Webster
IPC分类号: H01L2100
CPC分类号: H01L21/76808 , H01L21/76801 , H01L21/76807 , H01L21/76892 , H01L23/525 , H01L23/5329 , H01L23/53295 , H01L2221/1031 , H01L2924/0002 , H01L2924/00
摘要: A method of reworking BEOL (back end of a processing line) metallization levels of damascene metallurgy comprises forming a plurality of BEOL metallization levels over a substrate, forming line and via portions in the BEOL metallization levels, selectively removing at least one of the BEOL metallization levels to expose the line and via portions, and replacing the removed BEOL metallization levels with at least one new BEOL metallization level, wherein the BEOL metallization levels comprise a first dielectric layer and a second dielectric layer, and wherein the first dielectric layer comprising a lower dielectric constant material than the second dielectric layer.
摘要翻译: 一种重新加工BEOL(处理线的后端)金刚石冶金的金属化水平的方法包括在衬底上形成多个BEOL金属化水平,在BEOL金属化水平中形成线和通孔部分,选择性地去除BEOL金属化中的至少一个 以暴露线路和通孔部分,并且用至少一个新的BEOL金属化水平替换去除的BEOL金属化水平,其中BEOL金属化水平包括第一介电层和第二介电层,并且其中第一介电层包括下部 介电常数材料比第二介电层。
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公开(公告)号:US06888251B2
公开(公告)日:2005-05-03
申请号:US10186814
申请日:2002-07-01
IPC分类号: H01L21/768 , H01L23/48
CPC分类号: H01L21/76843 , H01L21/76808 , H01L21/76811 , H01L21/76865
摘要: A method and structure for a single or dual damascene interconnect structure comprises forming wiring lines in a metallization layer over a substrate, shaping a laminated insulator stack above the metallization layer, patterning a hardmask over the laminated insulator stack, forming troughs in the hardmask, patterning the laminated insulator stack, forming vias in the patterned laminated insulator stack, creating sidewall spacers in the bottom portion of the vias, depositing an anti-reflective coating on the sidewall spacers, etching the troughs, removing the anti-reflective coating, depositing a metal layer in the troughs, vias, and sidewall spacers, and applying conductive material in the troughs and the vias. The laminated insulator stack comprises a dielectric layer further comprising oxide and polyarylene.
摘要翻译: 用于单镶嵌或双镶嵌互连结构的方法和结构包括在衬底上的金属化层中形成布线,在金属化层上形成叠层绝缘体堆叠,在叠层绝缘体堆叠上形成硬掩模,在硬掩模中形成槽, 层叠绝缘体堆叠,在图案化的层叠绝缘体堆叠中形成通路,在通孔的底部产生侧壁间隔物,在侧壁间隔物上沉积抗反射涂层,蚀刻槽,去除抗反射涂层,沉积金属 槽,通路和侧壁间隔物中的层,以及在槽和通孔中施加导电材料。 层压绝缘体堆叠包括还包含氧化物和聚亚芳基的电介质层。
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