Metal spacer in single and dual damascene processing
    2.
    发明授权
    Metal spacer in single and dual damascene processing 失效
    金属间隔物在单和双镶嵌加工

    公开(公告)号:US06888251B2

    公开(公告)日:2005-05-03

    申请号:US10186814

    申请日:2002-07-01

    IPC分类号: H01L21/768 H01L23/48

    摘要: A method and structure for a single or dual damascene interconnect structure comprises forming wiring lines in a metallization layer over a substrate, shaping a laminated insulator stack above the metallization layer, patterning a hardmask over the laminated insulator stack, forming troughs in the hardmask, patterning the laminated insulator stack, forming vias in the patterned laminated insulator stack, creating sidewall spacers in the bottom portion of the vias, depositing an anti-reflective coating on the sidewall spacers, etching the troughs, removing the anti-reflective coating, depositing a metal layer in the troughs, vias, and sidewall spacers, and applying conductive material in the troughs and the vias. The laminated insulator stack comprises a dielectric layer further comprising oxide and polyarylene.

    摘要翻译: 用于单镶嵌或双镶嵌互连结构的方法和结构包括在衬底上的金属化层中形成布线,在金属化层上形成叠层绝缘体堆叠,在叠层绝缘体堆叠上形成硬掩模,在硬掩模中形成槽, 层叠绝缘体堆叠,在图案化的层叠绝缘体堆叠中形成通路,在通孔的底部产生侧壁间隔物,在侧壁间隔物上沉积抗反射涂层,蚀刻槽,去除抗反射涂层,沉积金属 槽,通路和侧壁间隔物中的层,以及在槽和通孔中施加导电材料。 层压绝缘体堆叠包括还包含氧化物和聚亚芳基的电介质层。