公开(公告)号：US08592941B2

公开(公告)日：2013-11-26

申请号：US12838850

申请日：2010-07-19

申请人： Jeffrey P. Gambino ,  Tom C. Lee ,  Kevin G. Petrunich ,  David C. Thomas

发明人： Jeffrey P. Gambino ,  Tom C. Lee ,  Kevin G. Petrunich ,  David C. Thomas

IPC分类号： H01L21/82 ,  H01L21/326 ,  H01L21/44 ,  H01L23/52

CPC分类号： H01L27/11206 ,  H01L23/5258 ,  H01L27/112 ,  H01L2924/0002 ,  H01L2924/00

摘要： The disclosure relates generally to fuse structures, methods of forming and programming the same, and more particularly to fuse structures having crack stop voids. The fuse structure includes a semiconductor substrate having a dielectric layer thereon and a crack stop void. The dielectric layer includes at least one fuse therein and the crack stop void is adjacent to two opposite sides of the fuse, and extends lower than a bottom surface and above a top surface of the fuse. The disclosure also relates to a design structure of the aforementioned.

摘要翻译： 本公开一般涉及熔丝结构，其形成和编程的方法，更具体地涉及具有裂纹停止空隙的熔断结构。 熔丝结构包括其上具有介电层的半导体衬底和裂纹阻挡空隙。 电介质层包括至少一个熔断器，裂纹阻挡空隙与保险丝的两个相对的两侧相邻，并且比底表面和保险丝顶表面之上延伸。 本公开还涉及上述的设计结构。

公开(公告)号：US08084864B2

公开(公告)日：2011-12-27

申请号：US13114342

申请日：2011-05-24

申请人： Jonathan D. Chapple-Sokol ,  Daniel A. Delibac ,  Zhong-Xiang He ,  Tom C. Lee ,  William J. Murphy ,  Timothy D. Sullivan ,  David C. Thomas ,  Daniel S. Vanslette

发明人： Jonathan D. Chapple-Sokol ,  Daniel A. Delibac ,  Zhong-Xiang He ,  Tom C. Lee ,  William J. Murphy ,  Timothy D. Sullivan ,  David C. Thomas ,  Daniel S. Vanslette

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/76834 ,  H01L21/32051 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76858 ,  H01L2221/1078

摘要： A vertical metallic stack, from bottom to top, of an elemental metal liner, a metal nitride liner, a Ti liner, an aluminum portion, and a metal nitride cap, is formed on an underlying metal interconnect structure. The vertical metallic stack is annealed at an elevated temperature to induce formation of a TiAl3 liner by reaction of the Ti liner with the material of the aluminum portion. The material of the TiAl3 liner is resistant to electromigration, thereby providing enhanced electromigration resistance to the vertical metallic stack comprising the elemental metal liner, the metal nitride liner, the TiAl3 liner, the aluminum portion, and the metal nitride cap. The effect of enhanced electromigration resistance may be more prominent in areas in which the metal nitride cap suffers from erosion during processing.

摘要翻译： 在下面的金属互连结构上形成由元素金属衬垫，金属氮化物衬垫，Ti衬垫，铝部分和金属氮化物盖的从底部到顶部的垂直金属堆叠。 垂直金属叠层在升高的温度下退火，以通过Ti衬垫与铝部分的材料反应而引起TiAl 3衬层的形成。 TiAl 3衬垫的材料对电迁移是耐受的，从而对包括元素金属衬垫，金属氮化物衬垫，TiAl 3衬里，铝部分和金属氮化物盖的垂直金属堆叠提供增强的电迁移阻力。 在金属氮化物盖在加工过程中遭受侵蚀的区域中，增强的耐电迁移性的作用可能更为突出。

公开(公告)号：US20110221064A1

公开(公告)日：2011-09-15

申请号：US13114342

申请日：2011-05-24

申请人： Jonathan D. Chapple-Sokol ,  Daniel A. Delibac ,  Zhong-Xiang He ,  Tom C. Lee ,  William J. Murphy ,  Timothy D. Sullivan ,  David C. Thomas ,  Daniel S. Vanslette

发明人： Jonathan D. Chapple-Sokol ,  Daniel A. Delibac ,  Zhong-Xiang He ,  Tom C. Lee ,  William J. Murphy ,  Timothy D. Sullivan ,  David C. Thomas ,  Daniel S. Vanslette

IPC分类号： H01L23/522

CPC分类号： H01L21/76834 ,  H01L21/32051 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76858 ,  H01L2221/1078

摘要： A vertical metallic stack, from bottom to top, of an elemental metal liner, a metal nitride liner, a Ti liner, an aluminum portion, and a metal nitride cap, is formed on an underlying metal interconnect structure. The vertical metallic stack is annealed at an elevated temperature to induce formation of a TiAl3 liner by reaction of the Ti liner with the material of the aluminum portion. The material of the TiAl3 liner is resistant to electromigration, thereby providing enhanced electromigration resistance to the vertical metallic stack comprising the elemental metal liner, the metal nitride liner, the TiAl3 liner, the aluminum portion, and the metal nitride cap. The effect of enhanced electromigration resistance may be more prominent in areas in which the metal nitride cap suffers from erosion during processing.

摘要翻译： 在下面的金属互连结构上形成由元素金属衬垫，金属氮化物衬垫，Ti衬垫，铝部分和金属氮化物盖的从底部到顶部的垂直金属堆叠。 垂直金属叠层在升高的温度下退火，以通过Ti衬垫与铝部分的材料反应而引起TiAl 3衬层的形成。 TiAl 3衬垫的材料对电迁移是耐受的，从而对包括元素金属衬垫，金属氮化物衬垫，TiAl 3衬里，铝部分和金属氮化物盖的垂直金属堆叠提供增强的电迁移阻力。 在金属氮化物盖在加工过程中遭受侵蚀的区域中，增强的耐电迁移性的作用可能更为突出。

公开(公告)号：US06674168B1

公开(公告)日：2004-01-06

申请号：US10248452

申请日：2003-01-21

申请人： Edward C. Cooney, III ,  Robert M Geffken ,  Vincent J McGahay ,  William T. Motsiff ,  Mark P. Murray ,  Amanda L. Piper ,  Anthony K. Stamper ,  David C. Thomas ,  Christy S. Tyberg ,  Elizabeth T. Webster

发明人： Edward C. Cooney, III ,  Robert M Geffken ,  Vincent J McGahay ,  William T. Motsiff ,  Mark P. Murray ,  Amanda L. Piper ,  Anthony K. Stamper ,  David C. Thomas ,  Christy S. Tyberg ,  Elizabeth T. Webster

IPC分类号： H01L2100

CPC分类号： H01L21/76808 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76892 ,  H01L23/525 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of reworking BEOL (back end of a processing line) metallization levels of damascene metallurgy comprises forming a plurality of BEOL metallization levels over a substrate, forming line and via portions in the BEOL metallization levels, selectively removing at least one of the BEOL metallization levels to expose the line and via portions, and replacing the removed BEOL metallization levels with at least one new BEOL metallization level, wherein the BEOL metallization levels comprise a first dielectric layer and a second dielectric layer, and wherein the first dielectric layer comprising a lower dielectric constant material than the second dielectric layer.

摘要翻译： 一种重新加工BEOL（处理线的后端）金刚石冶金的金​​属化水平的方法包括在衬底上形成多个BEOL金属化水平，在BEOL金属化水平中形成线和通孔部分，选择性地去除BEOL金属化中的至少一个 以暴露线路和通孔部分，并且用至少一个新的BEOL金属化水平替换去除的BEOL金属化水平，其中BEOL金属化水平包括第一介电层和第二介电层，并且其中第一介电层包括下部 介电常数材料比第二介电层。

公开(公告)号：US5211480A

公开(公告)日：1993-05-18

申请号：US599814

申请日：1990-10-18

申请人： David C. Thomas ,  Stephen C. Jensen ,  Gerald R. Cucci ,  Charles M. Peterson ,  Shelle D. Tilstra ,  Steven J. Rychnovsky

发明人： David C. Thomas ,  Stephen C. Jensen ,  Gerald R. Cucci ,  Charles M. Peterson ,  Shelle D. Tilstra ,  Steven J. Rychnovsky

IPC分类号： G01K11/20

CPC分类号： G01K11/20

摘要： A temperature sensing system has a signal means which provides a signal representative of a temperature responsive luminescence, where the luminescence has a characteristic time-rate-of-decay. A means for comparison is connected to the signal means and samples the signal during two time intervals, the first interval overlapping the second. The averages of the samples are compared to provide a difference signal representative of the difference between the two measured averages. Control means coupled to the comparison means provide an output representing the temperature as a function of the time-rate-of-decay, by adjusting the overlapping intervals so that the difference signal converges to a preselected limit.

摘要翻译： 温度感测系统具有提供表示温度响应发光的信号的信号装置，其中发光具有特征的衰减衰减速率。 用于比较的装置连接到信号装置并且在两个时间间隔期间对信号进行采样，第一间隔与第二间隔重叠。 将样本的平均值进行比较，以提供表示两个测量平均值之间的差的差分信号。 耦合到比较装置的控制装置通过调整重叠间隔来提供表示作为衰减时间率的函数的温度的输出，使得差信号收敛到预选极限。

公开(公告)号：US4423781A

公开(公告)日：1984-01-03

申请号：US373821

申请日：1982-05-03

申请人： David C. Thomas

发明人： David C. Thomas

IPC分类号： C09K8/42 ,  E21B33/16 ,  E21B21/00 ,  E21B37/00

CPC分类号： E21B33/16 ,  C09K8/42 ,  Y10S507/928

摘要： Specification discloses a process for completing a wellbore into a subterranean reservoir. In completing the wellbore, a completion fluid is pumped into the wellbore casing to displace the mud contained therein, the improvement comprising pumping a spacer system into the wellbore casing before pumping the completion fluid into the wellbore. The spacer system comprises a spacer fluid having a viscosity sufficiently high such that the spacer fluid exists in either laminar or plug flow at normal circulation rates.

摘要翻译： 规范公开了一种完成井筒进入地下储层的方法。 在完成井眼时，将完井液泵送到井眼套管中以置换其中所含的泥浆，其改进包括在将完井流体泵入井眼之前将间隔器系统泵送到井筒壳体中。 间隔器系统包括具有足够高的粘度的间隔液，使得间隔液以正常循环速率以层流或塞流流动存在。

公开(公告)号：US20120102885A1

公开(公告)日：2012-05-03

申请号：US13060754

申请日：2009-10-13

申请人： Phillip Neal Sharp ,  Sven Newman ,  David C. Thomas ,  Anita G. Mooy

发明人： Phillip Neal Sharp ,  Sven Newman ,  David C. Thomas ,  Anita G. Mooy

IPC分类号： B65B3/02

CPC分类号： B65B43/02 ,  B05C17/00583 ,  B65B3/02 ,  B65B7/02 ,  B65B51/02 ,  B65B61/202 ,  B65B61/24 ,  B65B69/005 ,  B65D35/10 ,  B65D35/28 ,  B65D75/28 ,  B65D75/30 ,  B65D75/5811

摘要： A method of forming and filling a pouch, comprises forming opposing walls of a film; sealing the opposing walls of film together to form at least one pouch; filling an interior section of the at least one pouch through an opening in an upper portion of the at least one pouch with a flowable material; forming a top sealed expressing-shaped region to close the opening in the at least one pouch; and cradling the pouch with a foldable flat that is more rigid than the pouch that can be folded or rolled to compress the pouch to express the flowable material through the expressing shaped region.

摘要翻译： 一种形成和填充袋的方法，包括形成膜的相对壁; 将膜的相对的壁密封在一起以形成至少一个袋; 通过具有可流动材料的所述至少一个袋的上部中的开口填充所述至少一个袋的内部部分; 形成顶部密封的表面形状区域以封闭所述至少一个袋子中的开口; 并且用可折叠或可滚动以压缩袋以便通过表达成形区域表达可流动材料的小袋可折叠的扁平物包起来。

公开(公告)号：US20090230555A1

公开(公告)日：2009-09-17

申请号：US12049698

申请日：2008-03-17

申请人： Jonathan D. Chapple-Sokol ,  Daniel A. Delibac ,  Zhong-Xiang He ,  Tom C. Lee ,  William J. Murphy ,  Timothy D. Sullivan ,  David C. Thomas ,  Daniel S. Vanslette

发明人： Jonathan D. Chapple-Sokol ,  Daniel A. Delibac ,  Zhong-Xiang He ,  Tom C. Lee ,  William J. Murphy ,  Timothy D. Sullivan ,  David C. Thomas ,  Daniel S. Vanslette

IPC分类号： H01L23/532 ,  H01L21/768

CPC分类号： H01L23/53223 ,  H01L23/5329 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

摘要： An underlying interconnect level containing underlying W vias embedded in a dielectric material layer are formed on a semiconductor substrate. A metallic layer stack comprising, from bottom to top, a low-oxygen-reactivity metal layer, a bottom transition metal layer, a bottom transition metal nitride layer, an aluminum-copper layer, an optional top transition metal layer, and a top transition metal nitride layer. The metallic layer stack is lithographically patterned to form at least one aluminum-based metal line, which constitutes a metal interconnect structure. The low-oxygen-reactivity metal layer enhances electromigration resistance of the at least one aluminum-based metal line since formation of compound between the bottom transition metal layer and the dielectric material layer is prevented by the low-oxygen-reactivity metal layer, which does not interact with the dielectric material layer.

摘要翻译： 在半导体衬底上形成包含埋在电介质材料层中的底层W通孔的底层互连层。 一种金属层堆叠，包括从底部到顶部的低氧反应性金属层，底部过渡金属层，底部过渡金属氮化物层，铝 - 铜层，任选的顶部过渡金属层和顶部过渡层 金属氮化物层。 金属层堆叠被光刻图案化以形成至少一个构成金属互连结构的铝基金属线。 低氧反应性金属层由于通过低氧反应性金属层防止了底部过渡金属层和电介质材料层之间的化合物的形成，因此提高了至少一种铝基金属线的电迁移率 不与介电材料层相互作用。

公开(公告)号：US06982227B2

公开(公告)日：2006-01-03

申请号：US10687294

申请日：2003-10-16

申请人： Edward C. Cooney, III ,  Robert M. Geffken ,  Vincent J. McGahay ,  William T. Motsiff ,  Mark P. Murray ,  Amanda L. Piper ,  Anthony K. Stamper ,  David C. Thomas ,  Christy S. Tyberg ,  Elizabeth T. Webster

发明人： Edward C. Cooney, III ,  Robert M. Geffken ,  Vincent J. McGahay ,  William T. Motsiff ,  Mark P. Murray ,  Amanda L. Piper ,  Anthony K. Stamper ,  David C. Thomas ,  Christy S. Tyberg ,  Elizabeth T. Webster

IPC分类号： H01L21/302

CPC分类号： H01L21/76808 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76892 ,  H01L23/525 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of reworking BEOL (back end of a processing line) metallization levels of damascene metallurgy comprises forming a plurality of BEOL metallization levels over a substrate, forming line and via portions in the BEOL metallization levels, selectively removing at least one of the BEOL metallization levels to expose the line and via portions, and replacing the removed BEOL metallization levels with at least one new BEOL metallization level, wherein the BEOL metallization levels comprise a first dielectric layer and a second dielectric layer, and wherein the first dielectric layer comprising a lower dielectric constant material than the second dielectric layer.

摘要翻译： 一种重新加工BEOL（处理线的后端）金刚石冶金的金​​属化水平的方法包括在衬底上形成多个BEOL金属化水平，在BEOL金属化水平中形成线和通孔部分，选择性地去除BEOL金属化中的至少一个 以暴露线路和通孔部分，并且用至少一个新的BEOL金属化水平替换去除的BEOL金属化水平，其中BEOL金属化水平包括第一介电层和第二介电层，并且其中第一介电层包括下部 介电常数材料比第二介电层。

公开(公告)号：US4746621A

公开(公告)日：1988-05-24

申请号：US938498

申请日：1986-12-05

申请人： David C. Thomas ,  S. Simon Wong

发明人： David C. Thomas ,  S. Simon Wong

IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L21/425 ,  H01L21/443

CPC分类号： H01L21/76867 ,  H01L21/32051 ,  H01L21/76825 ,  H01L21/76831 ,  H01L21/76876 ,  H01L21/76879

摘要： A planar interconnect using selective deposition of a refractory metal such as tungsten into oxide channels is disclosed. A layer of silicon dioxide as thick as the desired tungsten interconnect is placed on the surface of a substrate such as an integrated circuit wafer. Thereafter, a layer of silicon nitride about 100 nm thick is formed on the silicon dioxide. Channels are formed in the silicon dioxide by patterning and etching the composite dielectric layers. After the photoresist is removed, silicon or tungsten atoms at 40 KeV are implanted in the silicon dioxide channels, the silicon nitride acting as a mask. Typically, a dosage as high as 1.times.10.sup.17 cm.sup.-2 is used. The silicon or tungsten implant allows seeding of the tungsten or other refractory metal. The silicon nitride mask is selectively removed by a hot phosphoric acid solution, and a metal film is then selectively deposited to fill the channels in the silicon dioxide layer, which then forms a level of interconnects. The process is repeated to form vias and subsequent levels of interconnects.

摘要翻译： 公开了使用将难熔金属如钨选择性沉积到氧化物通道中的平面互连。 将诸如所需钨互连的厚度的二氧化硅层放置在诸如集成电路晶片的衬底的表面上。 此后，在二氧化硅上形成约100nm厚的氮化硅层。 通过图案化和蚀刻复合电介质层，在二氧化硅中形成沟道。 在除去光致抗蚀剂之后，将40KeV的硅或钨原子注入到二氧化硅通道中，氮化硅用作掩模。 通常，使用高达1×10 17 cm -2的剂量。 硅或钨植入物允许接合钨或其它难熔金属。 通过热磷酸溶液选择性地除去氮化硅掩模，然后选择性地沉积金属膜以填充二氧化硅层中的通道，然后形成一定程度的互连。 重复该过程以形成通孔和随后的互连级别。