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公开(公告)号:US20100083009A1
公开(公告)日:2010-04-01
申请号:US12242000
申请日:2008-09-30
申请人: Efraim Rotem , Dan Baum , Doron Rajwan , Omer Vikinski , Ronny Korner , Kosta Luria
发明人: Efraim Rotem , Dan Baum , Doron Rajwan , Omer Vikinski , Ronny Korner , Kosta Luria
IPC分类号: G06F1/00
CPC分类号: G06F1/3203
摘要: Methods, apparatuses, and systems for managing power of a processing unit are described herein. Some embodiments include determining a voltage variation of a subset of current components of a current consumed by a processing unit. Other embodiments include detecting architectural events on a processing core of the processing unit and instituting various actions to reduce an input rate of instructions to the core. Other embodiments may be described and claimed.
摘要翻译: 本文描述了用于管理处理单元的功率的方法,装置和系统。 一些实施例包括确定由处理单元消耗的电流的当前分量的子集的电压变化。 其他实施例包括检测处理单元的处理核心上的架构事件并且建立各种动作以减少对核心的指令的输入速率。 可以描述和要求保护其他实施例。
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公开(公告)号:US08386807B2
公开(公告)日:2013-02-26
申请号:US12242000
申请日:2008-09-30
申请人: Efraim Rotem , Dan Baum , Rajwan Doron , Omer Vikinski , Ronny Korner , Kosta Luria
发明人: Efraim Rotem , Dan Baum , Rajwan Doron , Omer Vikinski , Ronny Korner , Kosta Luria
IPC分类号: G06F1/00
CPC分类号: G06F1/3203
摘要: Methods, apparatuses, and systems for managing power of a processing unit are described herein. Some embodiments include determining a voltage variation of a subset of current components of a current consumed by a processing unit. Other embodiments include detecting architectural events on a processing core of the processing unit and instituting various actions to reduce an input rate of instructions to the core. Other embodiments may be described and claimed.
摘要翻译: 本文描述了用于管理处理单元的功率的方法,装置和系统。 一些实施例包括确定由处理单元消耗的电流的当前分量的子集的电压变化。 其他实施例包括检测处理单元的处理核心上的架构事件并且建立各种动作以减少对核心的指令的输入速率。 可以描述和要求保护其他实施例。
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公开(公告)号:US08539269B2
公开(公告)日:2013-09-17
申请号:US13077618
申请日:2011-03-31
申请人: Efraim Rotem , Avinash N. Ananthakrishnan , Doron Rajwan , Kosta Luria , Ronny Korner , Dan Baum
发明人: Efraim Rotem , Avinash N. Ananthakrishnan , Doron Rajwan , Kosta Luria , Ronny Korner , Dan Baum
IPC分类号: G06F1/32
CPC分类号: G06F1/30 , G06F1/28 , G06F1/3243 , G06F11/004 , G06F11/3024 , G06F11/3058 , G06F11/348 , G06F2201/81 , G06F2201/86 , Y02D10/152
摘要: An apparatus may comprise one or more processor cores of a processor and a set of current limiters. Each current limiter may be coupled to a respective processor core and arranged to monitor processor activity in the processor, to compare the processor activity to one or more current limits of multiple current limits; and to initiate a current-limiting action when the one or more current limits is exceeded.
摘要翻译: 设备可以包括处理器的一个或多个处理器核心和一组限流器。 每个限流器可以耦合到相应的处理器核心并且被布置成监视处理器中的处理器活动,以将处理器活动与多个电流限制的一个或多个电流限制进行比较; 并且当超过一个或多个电流限制时启动限流动作。
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公开(公告)号:US20120254641A1
公开(公告)日:2012-10-04
申请号:US13077618
申请日:2011-03-31
IPC分类号: G06F1/32
CPC分类号: G06F1/30 , G06F1/28 , G06F1/3243 , G06F11/004 , G06F11/3024 , G06F11/3058 , G06F11/348 , G06F2201/81 , G06F2201/86 , Y02D10/152
摘要: An apparatus may comprise one or more processor cores of a processor and a set of current limiters. Each current limiter may be coupled to a respective processor core and arranged to monitor processor activity in the processor, to compare the processor activity to one or more current limits of multiple current limits; and to initiate a current-limiting action when the one or more current limits is exceeded.
摘要翻译: 设备可以包括处理器的一个或多个处理器核心和一组限流器。 每个限流器可以耦合到相应的处理器核心并且被布置成监视处理器中的处理器活动,以将处理器活动与多个电流限制的一个或多个电流限制进行比较; 并且当超过一个或多个电流限制时启动限流动作。
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公开(公告)号:US08508073B2
公开(公告)日:2013-08-13
申请号:US13551481
申请日:2012-07-17
申请人: Hung-Piao Ma , Alon Naveh , Gil Schwarzband , Annabelle Pratt , Jorge Pedro Rodriguez , Joseph T. Dibene, II , Sean M. Welch , Kosta Luria , Edward R. Stanford
发明人: Hung-Piao Ma , Alon Naveh , Gil Schwarzband , Annabelle Pratt , Jorge Pedro Rodriguez , Joseph T. Dibene, II , Sean M. Welch , Kosta Luria , Edward R. Stanford
IPC分类号: H02J1/00
CPC分类号: H02J1/10 , G11C5/147 , H02J2001/008 , Y10T307/305 , Y10T307/658 , Y10T307/675
摘要: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.
摘要翻译: 同时调节通过电压调节器提供给集成电路的两个或多个电源电压的方法和机制。 在本发明的一个实施例中,在集成电路和电压调节器之间交换的电压调节消息包括一个标识符,该标识符指示通过电压调节器从提供给集成电路的多个电源电压中选择的两个或多个电源电压,其中电压调节 消息涉及所指示的两个或更多个电源电压。 在另一个实施例中,电压调节消息指示所指示的两个或更多个电源电压要转换到的期望电源电压电平。
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公开(公告)号:US08222766B2
公开(公告)日:2012-07-17
申请号:US13094599
申请日:2011-04-26
申请人: Hung-Piao Ma , Alon Naveh , Gil Schwarzband , Annabelle Pratt , Jorge Rodriguez , Joseph T. Dibene, II , Sean M. Welch , Kosta Luria , Edward R. Stanford
发明人: Hung-Piao Ma , Alon Naveh , Gil Schwarzband , Annabelle Pratt , Jorge Rodriguez , Joseph T. Dibene, II , Sean M. Welch , Kosta Luria , Edward R. Stanford
IPC分类号: H02J1/00
CPC分类号: H02J1/10 , G11C5/147 , H02J2001/008 , Y10T307/305 , Y10T307/658 , Y10T307/675
摘要: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.
摘要翻译: 同时调节通过电压调节器提供给集成电路的两个或多个电源电压的方法和机制。 在本发明的一个实施例中,在集成电路和电压调节器之间交换的电压调节消息包括一个标识符,该标识符指示通过电压调节器从提供给集成电路的多个电源电压中选择的两个或多个电源电压,其中电压调节 消息涉及所指示的两个或更多个电源电压。 在另一个实施例中,电压调节消息指示所指示的两个或更多个电源电压要转换到的期望电源电压电平。
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公开(公告)号:US20240061486A1
公开(公告)日:2024-02-22
申请号:US18086882
申请日:2022-12-22
申请人: Pavan Kumar , Michael Zelikson , Kosta Luria , Robert Santucci , Nadav Shulman , Horthense Tamdem
发明人: Pavan Kumar , Michael Zelikson , Kosta Luria , Robert Santucci , Nadav Shulman , Horthense Tamdem
IPC分类号: G06F1/28
CPC分类号: G06F1/28
摘要: To address problems associated with power management of electronic devices, the subject matter described herein provides improved power management solutions that enable CPUs and other electronic components to characterize real-time power consumption. This may be used to assess an effect of added platform level features after factory testing, and may be used to improve or optimize system performance. These solutions may include an accurate platform-independent integrated voltage measurement, dedicated to a reliable absolute voltage measurement that may be used for multiple purposes. The subject matter described herein proposes a combination of a voltage detector and an algorithm implemented in the electronic component (e.g., CPU) that may be used to compensate for voltage variations due to tolerances or guard bands, and may be used to detect discrepancies of underreporting or overreporting of current information by the platform VR.
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公开(公告)号:US20110199153A1
公开(公告)日:2011-08-18
申请号:US13094599
申请日:2011-04-26
申请人: Hung-Piao Ma , Alon Naveh , Gil Schwarzband , Annabelle Pratt , Jorge Pedro Rodriguez , Joseph T. Dibene, II , Sean M. Welch , Kosta Luria , Edward R. Stanford
发明人: Hung-Piao Ma , Alon Naveh , Gil Schwarzband , Annabelle Pratt , Jorge Pedro Rodriguez , Joseph T. Dibene, II , Sean M. Welch , Kosta Luria , Edward R. Stanford
IPC分类号: G05F3/02
CPC分类号: H02J1/10 , G11C5/147 , H02J2001/008 , Y10T307/305 , Y10T307/658 , Y10T307/675
摘要: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.
摘要翻译: 同时调节通过电压调节器提供给集成电路的两个或多个电源电压的方法和机制。 在本发明的一个实施例中,在集成电路和电压调节器之间交换的电压调节消息包括一个标识符,该标识符指示通过电压调节器从提供给集成电路的多个电源电压中选择的两个或多个电源电压,其中电压调节 消息涉及所指示的两个或更多个电源电压。 在另一个实施例中,电压调节消息指示所指示的两个或更多个电源电压要转换到的期望电源电压电平。
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公开(公告)号:US20100164552A1
公开(公告)日:2010-07-01
申请号:US12319003
申请日:2008-12-31
申请人: Kosta Luria , Joseph Shor , Dadashev Oleg
发明人: Kosta Luria , Joseph Shor , Dadashev Oleg
CPC分类号: G01K7/01 , G01K2219/00
摘要: In some embodiments, a new DTS implementation, which employs the conventional Vbe/ΔVbe temperature dependent principles but substitutes a voltage-to-frequency (V/F) based ratio meter for the DAC based approach. This new approach can result in a more simplified circuit that may be more variation tolerant and can require less power and area.
摘要翻译: 在一些实施例中,新的DTS实现方案采用传统的Vbe /&Dgr。Vbe温度依赖性原理,而将基于电压 - 频率(V / F)的比值计替换为基于DAC的方法。 这种新方法可以导致更简化的电路,其可以具有更宽的变化,并且可以要求更少的功率和面积。
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公开(公告)号:US20230205243A1
公开(公告)日:2023-06-29
申请号:US17561064
申请日:2021-12-23
申请人: Lior Gil , Kosta Luria , Michael Zelikson
发明人: Lior Gil , Kosta Luria , Michael Zelikson
摘要: Some embodiments include an apparatus including a first node in a voltage regulator, a second node in the voltage regulator, and a power stage to receive a first voltage from the first node and provide a second voltage at the second node. The power stage includes a first circuit path and a second circuit path coupled in parallel with each other between the first and second nodes. The first circuit path includes a first number of at least one transistor coupled between the first and second nodes The second circuit path includes a second number of at least one transistor between the first and second nodes. Wherein the first number is unequal to the second number.
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