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公开(公告)号：US20210357753A1
公开(公告)日：2021-11-18
申请号：US17317607
申请日：2021-05-11
Inventor： Jin Kyu KIM , Byung Jo KIM , Seong Min KIM , Ju-Yeob KIM , Ki Hyuk PARK , Mi Young LEE , Joo Hyun LEE , Young-deuk JEON , Min-Hyung CHO
Abstract: A method and apparatus for multi-level stepwise quantization for neural network are provided. The apparatus sets a reference level by selecting a value from among values of parameters of the neural network in a direction from a high value equal to or greater than a predetermined value to a lower value, and performs learning based on the reference level. The setting of a reference level and the performing of learning are iteratively performed until the result of the reference level learning satisfies a predetermined value and there is no variable parameter that is updated during learning among the parameters.
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公开(公告)号：US20200177195A1
公开(公告)日：2020-06-04
申请号：US16701482
申请日：2019-12-03
Inventor： Young-deuk JEON , MIN-HYUNG CHO , JOO HYUN LEE
Abstract: An analog-to-digital converter includes a capacitor array including capacitors, an amplifier receiving an input current through an input node and integrating the input current, using the capacitor array, in a first mode, a switch array including switches respectively connected to the capacitors, successive approximation logic performing a successive approximation by selectively connecting each of the capacitors to one of a common voltage and a reference voltage through the switches, in a second mode, a comparator comparing the common voltage with an output of the amplifier and output a pulse signal based on the comparison result, a counter counting the pulse signal in the first mode, a register sequentially storing values of the pulse signal, in the second mode, and error correction logic storing an output of the counter as upper bits and an output of the register as lower bits and performing error correction.
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公开(公告)号：US20190342993A1
公开(公告)日：2019-11-07
申请号：US16217629
申请日：2018-12-12
Inventor： Seongdeok AHN , Seung Youl KANG , Seong Hyun KIM , Hye Jin KIM , Kang-Ho PARK , Jeong Ik LEE , Young-deuk JEON , Chi-Sun HWANG , Jae Bon KOO , Su Jae LEE
Abstract: Provided is stretchable electronics. The stretchable electronics includes stretchable substrate, first support patterns disposed on a first surface of the stretchable substrate, and output devices disposed on the first patterns, respectively. The first support patterns are arranged in a first direction and a second direction, which are parallel to an extension direction of the substrate, and each of the output devices generates an output stimulation.
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公开(公告)号：US20210303982A1
公开(公告)日：2021-09-30
申请号：US17205433
申请日：2021-03-18
Inventor： Mi Young LEE , Young-deuk JEON , Byung Jo KIM , Ju-Yeob KIM , Jin Kyu KIM , Ki Hyuk PARK , JOO HYUN LEE , MIN-HYUNG CHO
Abstract: Disclosed is a neural network computing device. The neural network computing device includes a neural network accelerator including an analog MAC, a controller controlling the neural network accelerator in one of a first mode and a second mode, and a calibrator that calibrating a gain and a DC offset of the analog MAC. The calibrator includes a memory storing weight data, calibration weight data, and calibration input data, a gain and offset calculator reading the calibration weight data and the calibration input data from the memory, inputting the calibration weight data and the calibration input data to the analog MAC, receiving calibration output data from the analog MAC, and calculating the gain and the DC offset of the analog MAC, and an on-device quantizer reading the weight data, receiving the gain and the DC offset, generating quantized weight data, based on the gain and the DC offset.
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公开(公告)号：US20210151091A1
公开(公告)日：2021-05-20
申请号：US16997445
申请日：2020-08-19
Inventor： Young-deuk JEON , Seong Min KIM , Jin Kyu KIM , Joo Hyun LEE , Min-Hyung CHO , Jin Ho HAN
IPC: G11C11/4076 , G11C11/4099 , G11C11/4096
Abstract: Disclosed are a device and a method for calibrating a reference voltage. The reference voltage calibrating device includes a data signal communication unit that transmits/receives a data signal, a data strobe signal receiving unit that receives a first data strobe signal and a second data strobe signal, a voltage level of the second data strobe signal being opposite to a voltage level of the first data strobe signal, and a reference voltage generating unit that sets a reference voltage for determining a data value of the data signal, based on the first data strobe signal and the second data strobe signal, and the reference voltage generating unit adjusts the reference voltage based on the first data strobe signal and the second data strobe signal.
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Patent Agency Ranking
公开(公告)号：US20200226456A1
公开(公告)日：2020-07-16
申请号：US16742808
申请日：2020-01-14
Inventor： Young-deuk JEON , Byung Jo KIM , Ju-Yeob KIM , Jin Kyu KIM , Ki Hyuk PARK , Mi Young LEE , Joo Hyun LEE , Min-Hyung CHO
Abstract: The neuromorphic arithmetic device comprises an input monitoring circuit that outputs a monitoring result by monitoring that first bits of at least one first digit of a plurality of feature data and a plurality of weight data are all zeros, a partial sum data generator that skips an arithmetic operation that generates a first partial sum data corresponding to the first bits of a plurality of partial sum data in response to the monitoring result while performing the arithmetic operation of generating the plurality of partial sum data, based on the plurality of feature data and the plurality of weight data, and a shift adder that generates the first partial sum data with a zero value and result data, based on second partial sum data except for the first partial sum data among the plurality of partial sum data and the first partial sum data generated with the zero value.
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公开(公告)号：US20220158634A1
公开(公告)日：2022-05-19
申请号：US17484375
申请日：2021-09-24
Inventor： MIN-HYUNG CHO , Young-deuk JEON , In San JEON , Jin Ho HAN
Abstract: Disclosed is a transmitter which includes a channel driver that includes a pull-up transistor and a pull-down transistor connected between a power node and a ground node and outputs a voltage between the pull-up transistor and the pull-down transistor as a transmit signal, and a pre-driver that controls the pull-up transistor and the pull-down transistor in response to a driving signal and controls the channel driver such that the transmit signal is overshot at a rising edge of the driving signal and the transmit signal is undershot at a falling edge of the driving signal.
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公开(公告)号：US20200174751A1
公开(公告)日：2020-06-04
申请号：US16695509
申请日：2019-11-26
Inventor： Min-Hyung CHO , Young-deuk JEON , Ki Hyuk PARK , Joo Hyun LEE
Abstract: The neuromorphic arithmetic device performs a multiply-accumulate (MAC) calculation using a multiplier and an accumulator. The neuromorphic arithmetic device includes an offset accumulator configured to receive a plurality of offset data measured a plurality of times and accumulate the plurality of offset data, a bit extractor configured to obtain average offset data by extracting at least one first bit from the plurality of accumulated offset data, and a cumulative synapse array configured to accumulate a plurality of multiplication values generated by the multiplier and output a cumulative result of the plurality of multiplication values corrected according to the average offset data.
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9.发明申请ANALOG-TO-DIGITAL CONVERTING DEVICE AND METHOD OF OPERATING ANALOG-TO-DIGITAL CONVERTING DEVICE 有权模拟数字转换器件和操作模拟数字转换器件的方法公开(公告)号：US20160336951A1
公开(公告)日：2016-11-17
申请号：US15083096
申请日：2016-03-28
Inventor： Young-deuk JEON , MIN-HYUNG CHO , Yi-Gyeong KIM , Chun-Gi LYUH
Abstract: Provided is an analog-to-digital converting device. The analog-to-digital converting device may include a determination circuit that determination whether a reference digital signal or a determination digital signal obtained by conversion of a reference voltage or a determination voltage matches a test pattern for the reference voltage, and it is possible to monitor whether the analog-to-digital converting device normally operates, according to whether there is matching.
Abstract translation: 提供了一种模拟 - 数字转换装置。 模拟数字转换装置可以包括确定电路，其确定参考数字信号或通过转换参考电压或确定电压获得的确定数字信号是否与参考电压的测试模式匹配，并且可以 根据是否存在匹配，监控模数转换设备是否正常运行。
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10.发明申请SENSING CIRCUIT FOR RECOGNIZING MOVEMENT AND MOVEMENT RECOGNIZING METHOD THEREOF 有权用于识别运动的感测电路和运动识别方法公开(公告)号：US20150260846A1
公开(公告)日：2015-09-17
申请号：US14454603
申请日：2014-08-07
Inventor： Chun-Gi LYUH , Jung Hee SUK , Young-deuk JEON , Tae Moon ROH
CPC classification number: G01S17/58 , G01S7/4912 , G01S17/003
Abstract: Provided is a sensing circuit for recognizing a movement including: at least one light emitting device outputting light; at least one light receiving device receiving the light reflected by an object on the light emitting device and generating a plurality of current signals proportional to an amount of incident light; a signal conversion unit converting the plurality of current signals into a plurality of digital signals; a recognition unit measuring a synthetic digital signal to determine whether an object moves by receiving the plurality of current signals; and a control unit controlling the recognition unit, wherein the recognition unit generates a clock signal for the synthetic digital signal greater than a critical value and measures a count generated by the clock signal; and the control unit determines whether the object moves through a comparison of the count and a reference value.
Abstract translation: 提供一种用于识别移动的感测电路，包括：至少一个输出光的发光装置; 至少一个光接收装置，其接收由所述发光装置上的物体反射的光，并产生与入射光量成比例的多个电流信号; 信号转换单元，将所述多个电流信号转换成多个数字信号; 识别单元，测量合成数字信号，以通过接收多个电流信号来确定对象是否移动; 以及控制单元，其控制所述识别单元，其中所述识别单元生成大于临界值的所述合成数字信号的时钟信号，并测量由所述时钟信号产生的计数; 并且控制单元确定对象是否通过计数和参考值的比较来移动。
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