公开(公告)号：US12013662B2

公开(公告)日：2024-06-18

申请号：US17523197

申请日：2021-11-10

申请人： Electronics and Telecommunications Research Institute ,  MVTECH

发明人： Jae-Eun Pi ,  Yong Hae Kim ,  Jong-Heon Yang ,  Chul Woong Joo ,  Chi-Sun Hwang ,  Ha Kyun Lee ,  Seung Youl Kang ,  Gi Heon Kim ,  Joo Yeon Kim ,  Hee-ok Kim ,  Jeho Na ,  Jaehyun Moon ,  Won Jae Lee ,  Seong-Mok Cho ,  Ji Hun Choi

IPC分类号： G03H1/22 ,  G01B11/02 ,  G06T7/536

CPC分类号： G03H1/2249 ,  G01B11/026 ,  G06T7/536 ,  G03H2001/2281 ,  G03H2210/30 ,  G03H2222/12 ,  G03H2223/19 ,  G06T2207/10028

摘要： An apparatus which analyses a depth of a holographic image is provided. The apparatus includes an acquisition unit that acquires a hologram, a restoration unit that restores a three-dimensional holographic image by irradiating the hologram with a light source, an image sensing unit that senses a depth information image of the restored holographic image, and an analysis display unit that analyzes a depth quality of the holographic image, based on the sensed depth information image, and the image sensing unit uses a lensless type of photosensor.

公开(公告)号：US12055891B2

公开(公告)日：2024-08-06

申请号：US17491246

申请日：2021-09-30

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Yong Hae Kim ,  Gi Heon Kim ,  Joo Yeon Kim ,  Jong-Heon Yang ,  Sang Hoon Cheon ,  Seong-Mok Cho ,  Kyunghee Choi ,  Ji Hun Choi ,  Jae-Eun Pi ,  Chi-Sun Hwang

IPC分类号： G03H1/22

CPC分类号： G03H1/2294 ,  G03H2225/22 ,  G03H2225/34

摘要： Provided is an operation method for a digital hologram implementation device including a backlight and a spatial light modulator, the operation method including setting an initial phase value of an optical signal to a remedy phase, computing a reduced phase based on the remedy phase, correcting the remedy phase based on a difference between the reduced phase and a preset optimized phase, determining whether the corrected remedy phase is a stabilized phase, performing forward propagation on the stabilized phase and an amplitude of the optical signal, correcting the amplitude of the optical signal, performing backward propagation on the corrected amplitude and the stabilized phase, and determining whether a phase derived by the backward propagation is an optimized phase.

公开(公告)号：US11372294B2

公开(公告)日：2022-06-28

申请号：US17015173

申请日：2020-09-09

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Ji Hun Choi

IPC分类号： G02F1/1362 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/1335 ,  H01L27/12 ,  G09G3/36 ,  G02F1/1333

摘要： Provided is a display device. The display device includes a data line extending in a first direction, a reflective electrode on the data line, and a transistor formed between the data line and the reflective electrode. The transistor includes a first electrode connected to the data line, a second electrode spaced apart from the first electrode in the first direction and connected to the reflective electrode, and a semiconductor layer connecting the first electrode and the second electrode.

公开(公告)号：US11832486B2

公开(公告)日：2023-11-28

申请号：US17943528

申请日：2022-09-13

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Jong-Heon Yang ,  Seung Youl Kang ,  Yong Hae Kim ,  Hee-ok Kim ,  Jeho Na ,  Jaehyun Moon ,  Chan Woo Park ,  Himchan Oh ,  Seong-Mok Cho ,  Sung Haeng Cho ,  Ji Hun Choi ,  Jae-Eun Pi ,  Chi-Sun Hwang

IPC分类号： H10K59/131 ,  G09G3/3225 ,  G09G3/3266 ,  H10K59/124

CPC分类号： H10K59/131 ,  G09G3/3225 ,  G09G3/3266 ,  G09G2300/0426 ,  G09G2300/0814 ,  G09G2300/0842 ,  H10K59/124

摘要： Provided are a semiconductor device, a display panel, and a display device including the same. The semiconductor device includes a lower electrode on one side of a substrate, a spacer on another side of the substrate, a middle electrode on the spacer, a lower channel layer on portions of a sidewall of the spacer, the middle electrode, and the lower electrode, a lower gate insulating layer on the lower channel layer, a common gate electrode on the gate insulating layer, an upper gate insulating layer on the common gate electrode, an upper electrode on the spacer and the upper gate insulating layer of the middle electrode, an upper channel layer connected to the upper electrode and disposed on a sidewall of the upper gate insulating layer, and a contact electrode connected to a portion of the upper channel layer and passing through the lower gate insulating layer and the upper gate insulating layer outside the common gate electrode so as to be connected to the lower electrode.

公开(公告)号：US10802367B2

公开(公告)日：2020-10-13

申请号：US16026970

申请日：2018-07-03

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Ji Hun Choi

IPC分类号： G02F1/1362 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/1335 ,  H01L27/12 ,  G02F1/1333 ,  G09G3/36

摘要： Provided is a display device. The display device includes a data line extending in a first direction, a reflective electrode on the data line, and a transistor formed between the data line and the reflective electrode. The transistor includes a first electrode connected to the data line, a second electrode spaced apart from the first electrode in the first direction and connected to the reflective electrode, and a semiconductor layer connecting the first electrode and the second electrode.

公开(公告)号：US12021151B2

公开(公告)日：2024-06-25

申请号：US17523320

申请日：2021-11-10

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE ,  Korea Advanced Institute of Science and Technology

发明人： Chi-Sun Hwang ,  SangHee Park ,  KwangHeum Lee ,  Jae-Eun Pi ,  SeungHee Lee ,  Jong-Heon Yang ,  Ji Hun Choi

IPC分类号： H01L29/786 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/40 ,  H01L29/49 ,  H01L29/66

CPC分类号： H01L29/78642 ,  H01L21/76877 ,  H01L21/823418 ,  H01L21/823437 ,  H01L29/401 ,  H01L29/4908 ,  H01L29/6653 ,  H01L29/6675 ,  H01L29/66969 ,  H01L29/78696 ,  H01L29/7869

摘要： A vertical channel thin film transistor includes substrate, lower source/drain electrode, spacer layer, upper source/drain electrode covering portion of upper surface of the spacer layer, interlayer insulating pattern covering portion of upper surface of the upper source/drain electrode and upper surface of the spacer layer exposed by the upper source/drain electrode, contact hole disposed on the lower source/drain electrode and passing through the interlayer insulating pattern, the upper source/drain electrode, and the spacer layer, active pattern covering inner wall and bottom surface of the contact hole and extending over upper surface of the upper source/drain electrode and upper surface of the interlayer insulating pattern, gate insulating pattern filling portion of the contact hole and extending along upper surface of the active pattern, and gate electrode filling portion of the contact hole and extending along upper surface of the gate insulating pattern.