Method of making a nonvolatile memory cell using EPROM mask and ROM
processing steps
    1.
    发明授权
    Method of making a nonvolatile memory cell using EPROM mask and ROM processing steps 失效
    使用EPROM掩模和ROM处理步骤制造非易失性存储单元的方法

    公开(公告)号:US6087228A

    公开(公告)日:2000-07-11

    申请号:US890052

    申请日:1997-07-09

    CPC分类号: H01L27/11266 H01L27/112

    摘要: The invention relates to a method of automatically shifting from the fabrication of an EPROM cell to the fabrication of a ROM cell, which method is specifically intended for semiconductor electronic circuits having a resident memory and is of the type wherein the structure of at least one memory cell transistor is defined on a semiconductor substrate using photolithographic techniques including an active area and a channel region, the cell being adapted to acquire a logic state selected by the user. Advantageously, the conductivity of the active area is changed to suit the logical contents that the cell is intended to contain.

    摘要翻译: 本发明涉及一种自动从EPROM单元的制造转移到ROM单元的制造方法,该方法专门用于具有驻留存储器的半导体电子电路,并且是其中至少一个存储器的结构 使用包括有源区域和沟道区域的光刻技术在半导体衬底上限定单元晶体管,该单元适于获取由用户选择的逻辑状态。 有利地,有源区域的电导率被改变以适应单元意图包含的逻辑内容。

    Braking band, a ventilated disk-brake disk, and a core box for the production of a disk-brake disk core
    2.
    发明授权
    Braking band, a ventilated disk-brake disk, and a core box for the production of a disk-brake disk core 有权
    制动带,通风盘式制动盘和用于生产盘式制动盘芯的核心箱

    公开(公告)号:US07690484B2

    公开(公告)日:2010-04-06

    申请号:US10473822

    申请日:2002-04-05

    IPC分类号: F16D65/12

    摘要: A braking band with a remarkable capacity for improved cooling, for use in disk-brake disks, comprises two plates coaxial with an axis, facing one another, and spaced apart to form a space in which an air-flow takes place from the axis towards the outer side of the band, the plates having facing surfaces from which pillar-like elements extend, transversely, to connect the plates, the pillar-like elements being distributed in circular rings or rows concentric with the plates so as to be distributed uniformly in the space, those pillar-like elements which are disposed in inside rows of the braking band having rhombic cross-sections. The rhombic cross-sections of the pillar-like elements which are in inside rows of the band are symmetrical with respect to an axis transverse the direction of flow and each element for connection between the plates extends from one plate to the other whilst remaining within the space.

    摘要翻译: 用于盘式制动盘的具有显着的改进冷却能力的制动带包括两个与轴线同轴的板,彼此面对并间隔开以形成空间,在该空间中轴线向着 带的外侧,板具有相对的表面,柱状元件从该表面横向延伸以连接板,柱状元件分布在与板同心的圆形环或行中,以均匀地分布在 该空间,布置在具有菱形横截面的制动带的内侧行中的那些柱状元件。 在带的内部行中的柱状元件的菱形横截面相对于横向于流动方向的轴对称,并且用于板之间的连接的每个元件从一个板延伸到另一个板,同时保持在 空间。

    Monostabilized dynamic programmable logic array in CMOS technology
    3.
    发明授权
    Monostabilized dynamic programmable logic array in CMOS technology 失效
    CMOS技术中的单稳态动态可编程逻辑阵列

    公开(公告)号:US5274282A

    公开(公告)日:1993-12-28

    申请号:US970609

    申请日:1992-10-30

    CPC分类号: H03K19/17716

    摘要: The circuit includes an input register (RI); an output register (RU); an AND plane; and an OR plane. The AND plane has vertical lines (Y), which are controlled by the input register, and horizontal lines (L), which include transistors (TA) arranged in series and controlled by respective vertical lines. The horizontal lines are connected to ground by normally-off transistors (TV) and to the power supply by normally-on transistors (TP). These transistors (TV, TP) are controlled by a first clock signal (CK1.about.). The OR plane has horizontal lines (S) and vertical lines (U). The vertical lines (U) of the OR plane contain normally-off transistors (TO) which are controlled by respective horizontal lines of the OR plane. Horizontal lines of the AND plane and horizontal lines of the OR plane are connected by respective pairs of normally-on transistors (TB) and normally-off transistors (TC) arranged in series between the power supply and ground. In each pair, the normally-on transistor is controlled by a horizontal line of the AND plane, and the normally-off transistor is controlled by a second clock signal (CK2). A horizontal line of the OR plane is connected to the node between the pair. The vertical lines of the OR plane are connected to the power supply by respective transistors (TR), which are controlled by a third clock signal (CK2.about.), and to the output register by pass transistors (P), which are controlled by a fourth clock signal (CK3.about.).

    摘要翻译: 该电路包括一个输入寄存器(RI); 输出寄存器(RU); 一个AND平面; 和OR平面。 AND平面具有由输入寄存器控制的垂直线(Y)和包括串联布置并由相应垂直线控制的晶体管(TA)的水平线(L)。 水平线通过常闭晶体管(TV)连接到地,并通过常开晶体管(TP)连接到电源。 这些晶体管(TV,TP)由第一时钟信号(CK1 DIFFERENCE)控制。 OR平面具有水平线(S)和垂直线(U)。 OR平面的垂直线(U)包含由OR平面的相应水平线控制的常闭晶体管(TO)。 AND平面的水平线和OR平面的水平线通过串联布置在电源和地之间的各对正常导通晶体管(TB)和常关断晶体管(TC)连接。 在每对中,常通晶体管由AND平面的水平线控制,而常闭晶体管由第二时钟信号(CK2)控制。 OR平面的水平线连接到该对之间的节点。 OR平面的垂直线通过由第三时钟信号(CK2 DIFFERENCE)控制的相应晶体管(TR)连接到电源,并且由通过晶体管(P)控制的输出寄存器 第四个时钟信号(CK3 DIFFERENCE)。

    Method and tools for the production of a braking band for a brake disk
    5.
    发明授权
    Method and tools for the production of a braking band for a brake disk 有权
    用于制造制动盘的制动带的方法和工具

    公开(公告)号:US07228947B2

    公开(公告)日:2007-06-12

    申请号:US10479052

    申请日:2001-05-28

    IPC分类号: F16D65/847

    摘要: The invention relates to a method and tools for producing a braking band (2) of a disk-brake disk (1) by casting, in which the disk comprises at least two plates (3, 3′) connected to one another by connecting elements (4) forming an internal air-duct (7) for the cooling of the braking band (2). With the method and the tools, a disk is produced in which at least one of the plates (3, 3′) has, in its surface (8, 8′) defining the air-ducts (7), at least one groove (10, 10′) having a cross-section which becomes wider towards the air-duct.

    摘要翻译: 本发明涉及一种用于通过铸造来生产盘式制动盘(1)的制动带(2)的方法和工具,其中盘包括通过连接元件彼此连接的至少两个板(3,3'), (4)形成用于制冷带(2)的冷却的内部空气管道(7)。 利用该方法和工具,产生盘,其中至少一个板(3,3')在其表面(8,8')中具有限定空气管道(7)的至少一个凹槽(3,3'), 10,10')具有朝向空气管道变宽的横截面。

    NOR-type ROM with LDD cells and process of fabrication
    6.
    发明授权
    NOR-type ROM with LDD cells and process of fabrication 失效
    具有LDD电池的NOR型ROM和制造工艺

    公开(公告)号:US5793086A

    公开(公告)日:1998-08-11

    申请号:US772301

    申请日:1996-12-23

    CPC分类号: H01L27/11266 H01L27/112

    摘要: ROM memories made in MOS or CMOS technology with LDD cells may be programmed advantageously in a relatively advanced stage of fabrication by decoupling an already formed drain region from the channel region of cells to be permanently made nonconductive (programmed) by implanting a dopant in an amount sufficient to invert the type of conductivity in a portion of the drain region adjacent to the channel region. In CMOS processes, the programming mask may be a purposely modified mask commonly used for implanting source/drain regions of transistors of a certain type of conductivity. By using high-energy implantation and a dedicated mask, the programming may be effected at even later stages of the fabrication process.

    摘要翻译: 在具有LDD单元的MOS或CMOS技术中制造的ROM存储器可以通过将已经形成的漏极区域与细胞的沟道区域去耦合而被有利地编程在相对较先进的制造阶段中,以通过将量子点 足以颠倒与沟道区相邻的漏极区的一部分中的导电性。 在CMOS工艺中,编程掩模可以是通常用于注入某种导电性晶体管的源极/漏极区域的特意修改的掩模。 通过使用高能量注入和专用掩模,编程可以在制造过程的甚至后期进行。

    Method of making NOR-type ROM with LDD cells
    7.
    发明授权
    Method of making NOR-type ROM with LDD cells 失效
    用LDD单元制作NOR型ROM的方法

    公开(公告)号:US5407852A

    公开(公告)日:1995-04-18

    申请号:US84971

    申请日:1993-06-28

    CPC分类号: H01L27/11266 H01L27/112

    摘要: ROM memories made in MOS or CMOS technology with LDD cells may be programmed advantageously in a relatively advanced stage of fabrication by decoupling an already formed drain region from the channel region of cells to be permanently made nonconductive (programmed) by implanting a dopant in an amount sufficient to invert the type of conductivity in a portion of the drain region adjacent to the channel region. In CMOS processes, the programming mask may be a purposely modified mask commonly used for implanting source/drain regions of transistors of a certain type of conductivity. By using high-energy implantation and a dedicated mask, the programming may be effected at even later stages of the fabrication process.

    摘要翻译: 在具有LDD单元的MOS或CMOS技术中制造的ROM存储器可以通过将已经形成的漏极区域与细胞的沟道区域去耦合而被有利地编程在相对较先进的制造阶段中,以通过将量子点 足以颠倒与沟道区相邻的漏极区的一部分中的导电性。 在CMOS工艺中,编程掩模可以是通常用于注入某种导电性晶体管的源极/漏极区域的特意修改的掩模。 通过使用高能量注入和专用掩模,编程可以在制造过程的甚至后期进行。

    Braking band for a brake disk
    8.
    发明授权
    Braking band for a brake disk 有权
    制动盘制动带

    公开(公告)号:US07234572B2

    公开(公告)日:2007-06-26

    申请号:US10479038

    申请日:2002-05-17

    IPC分类号: F16D65/12

    摘要: A braking band for a disk-brake disk which is capable of exceptionally quiet braking comprises at least two plates connected to one another by connecting elements, in which the space between the plates forms an internal air-duct for the cooling of the braking band. At least one of the plates has, in one of its surfaces defining the air-ducts, at least one groove which extends along at least a portion of an orbit around the axis of symmetry of the disk and the cross-section of which becomes wider towards the air-duct.

    摘要翻译: 能够非常安静地制动的盘式制动盘的制动带包括通过连接元件彼此连接的至少两个板,其中板之间的空间形成用于制冷带的冷却的内部空气管。 至少一个板在其一个表面中限定了空气管道,其中至少一个槽围绕盘的对称轴的轨道的至少一部分延伸,并且其横截面变宽 朝向风道。