公开(公告)号：US20050186751A1

公开(公告)日：2005-08-25

申请号：US10653777

申请日：2003-09-02

申请人： Eric Beach ,  Walter Meinel ,  Eric Hoyt

发明人： Eric Beach ,  Walter Meinel ,  Eric Hoyt

IPC分类号： B23K26/18 ,  H01C17/242 ,  H01C17/26 ,  H01L21/02 ,  H01L21/20 ,  H01L21/3205 ,  H01L21/4763 ,  H01L29/00

CPC分类号： H01L28/20 ,  B23K26/18 ,  H01C17/242 ,  H01C17/26

摘要： A method and structure for controlling the surface properties in the dielectric layers in a thin film component can be provided for improving the trimming process of thin film element. A metal fill is configured with a uniform fill pattern beneath an array of thin film resistors, and can comprise a plurality of smaller features or peaks providing a finer fill pattern that improves the control of the topology of the dielectric layers. The fill pattern can be configured in various manners, such as fill patterns parallel to the thin film resistor, fill patterns perpendicular to the thin film resistor, or fill patterns comprising a checkerboard-like configuration. The method and device for controlling the dielectric layers can also provide for a reduction in the interferences that can be caused by reflecting back of the focused energy by comprising a dispersion arrangement configured to provide dispersive grading of the laser energy below the thin film resistor and thus reduce the interaction of reflected energy with the incident laser beam. The method also improves the contrast of the laser alignment targets with respect to their background.

公开(公告)号：US20060238292A1

公开(公告)日：2006-10-26

申请号：US11103203

申请日：2005-04-11

申请人： Eric Beach ,  Walter Meinel ,  Philipp Steinmann

发明人： Eric Beach ,  Walter Meinel ,  Philipp Steinmann

IPC分类号： H01C1/012

CPC分类号： H01L27/016 ,  H01L23/5228 ,  H01L28/20 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit thin film resistor structure includes a first dielectric layer (18A) disposed on a semiconductor layer (16), a first dummy fill layer (9A) disposed on the first dielectric layer (18B), a second dielectric layer (18C) disposed on the first dummy fill layer (9A), the second dielectric layer (18B) having a first planar surface (18-3), a first thin film resistor (2) disposed on the first planar surface (18-3) over the first dummy fill layer (9A). A first metal interconnect layer (22A,B) includes a first portion (22A) contacting a first head portion of the thin film resistor (2). A third dielectric layer (21) is disposed on the thin film resistor (2) and the first metal interconnect layer (22A,B). Preferably, the first thin film resistor (2) is symmetrically aligned with the first dummy fill layer (9A). In the described embodiments, the first dummy fill layer is composed of metal (integrated circuit metallization).

摘要翻译： 一种集成电路薄膜电阻器结构，包括设置在半导体层（16）上的第一介电层（18A），设置在第一介电层（18B）上的第一虚拟填充层（9A）），第二介电层 18A），所述第二电介质层（18B）具有第一平坦表面（18-3），第一薄膜电阻器（2）设置在所述第一平坦表面（18）上，所述第一平坦表面 3）在第一虚拟填充层（9A）上。 第一金属互连层（22A，B）包括接触薄膜电阻器（2）的第一头部的第一部分（22A）。 第三电介质层（21）设置在薄膜电阻器（2）和第一金属互连层（22A，B）上。 优选地，第一薄膜电阻器（2）与第一虚拟填充层（9A）对称地对准。 在所描述的实施例中，第一虚拟填充层由金属（集成电路金属化）组成。

公开(公告)号：US20060249793A1

公开(公告)日：2006-11-09

申请号：US11122458

申请日：2005-05-05

申请人： Eric Beach ,  Jimmy Naylor ,  Walter Meinel

发明人： Eric Beach ,  Jimmy Naylor ,  Walter Meinel

IPC分类号： H01L23/62

CPC分类号： H01L23/5228 ,  H01C1/14 ,  H01C7/006 ,  H01L27/0802 ,  H01L28/20 ,  H01L2924/0002 ,  H01L2924/00

摘要： A thin film resistor structure includes a plurality of thin film resistor sections. Conductive vias (5) are disposed on a first end of each of the thin film resistor sections, respectively. The first conductor (2) is connected to the vias of the first end, and a second conductor (3) is connected to vias on a second end of each of the thin film resistor sections. A distribution of a parameter of a batch of circuits including the thin film resistor structure indicates a systematic error in resistance values. Based on analysis of the distribution and the circuit, or more of the vias are individually moved at the layout grid level by a layout grid address unit to reduce the systematic error by making corresponding adjustments on a via reticle of a mask set used for making the circuits. Expensive laser trimming of thin film resistors of the circuit is thereby avoided.

摘要翻译： 薄膜电阻器结构包括多个薄膜电阻器部分。 导电通孔（5）分别设置在每个薄膜电阻器部分的第一端上。 第一导体（2）连接到第一端的通路，并且第二导体（3）连接到每个薄膜电阻器部分的第二端上的通孔。 包括薄膜电阻器结构的一批电路的参数分布指示电阻值的系统误差。 基于分布和电路的分析，或者通过布局网格地址单元在布局网格层面上单独地移动多个通孔，以通过对用于制作的掩模集的通孔掩模版进行相应的调整来减小系统误差 电路。 从而避免了电路薄膜电阻器的昂贵激光修整。

公开(公告)号：US08411442B2

公开(公告)日：2013-04-02

申请号：US12878572

申请日：2010-09-09

申请人： Walter Meinel ,  Kalin V. Lazarov

发明人： Walter Meinel ,  Kalin V. Lazarov

IPC分类号： H05K7/20

CPC分类号： H01L31/024 ,  H05K1/0201 ,  H05K1/113 ,  H05K1/115 ,  H05K2201/062 ,  H05K2201/10121 ,  H05K2201/10151

摘要： With infrared (IR) sensors, repeatability and accuracy can become an issue when there are thermal gradients between the sensor and an underlying printed circuit board (PCB). Conventionally, a large thermal mass is included in the sensor packaging to reduce the effect from such thermal gradients, but this increase costs and size of the sensor. Here, however, a PCB is provided that includes an isothermal cage included therein that generally ensures that the temperature of the underlying PCB and sensor are about the same by including structural features (namely, the isothermal cage) that generally ensure that the thermal time constant for a path from a heat source to the thermopile (which is within the sensor) is approximately the same as thermal time constants for paths through the PCB.

摘要翻译： 使用红外（IR）传感器，当传感器和底层印刷电路板（PCB）之间存在热梯度时，重复性和精度可能会成为问题。 通常，传感器包装中包含大的热质量以减少这种热梯度的影响，但这增加了传感器的成本和尺寸。 然而，这里提供了包括其中包括的等温笼的PCB，其通常包括通常确保热时间常数的结构特征（即等温笼）来确保底层PCB和传感器的温度大致相同 对于从热源到热电堆（传感器内部）的路径与通过PCB的路径的热时间常数大致相同。

公开(公告)号：US08546903B2

公开(公告)日：2013-10-01

申请号：US12900139

申请日：2010-10-07

申请人： Walter Meinel ,  Kalin V. Lazarov

发明人： Walter Meinel ,  Kalin V. Lazarov

IPC分类号： H01L31/058

CPC分类号： H01L23/585 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/00

摘要： There has been very little (if any) attention to address contamination diffusion within an integrated circuit (IC) because there are very few applications where a protective overcoat will be penetrated as part of the manufacturing process. Here, a sealing ring is provided that address this problem. Preferably, the sealing ring uses the combination of electrically conductive barrier rings and the tortuous migration path to allow an electronic device (i.e., thermopile), where a protective overcoat is penetrated during manufacture, to communicate with external devices while being isolated to prevent contamination.

摘要翻译： 对于集成电路（IC）中的污染物扩散，注意力很少（如果有的话），因为在制造过程中保护外套将被穿透的应用非常少。 这里提供了一个解决这个问题的密封圈。 优选地，密封环使用导电阻挡环和曲折迁移路径的组合来允许在制造期间穿透保护性外涂层的电子设备（即，热电堆）在被隔离的同时与外部设备隔离以防止污染。

公开(公告)号：US20120086098A1

公开(公告)日：2012-04-12

申请号：US12900139

申请日：2010-10-07

申请人： Walter Meinel ,  Kalin V. Lazarov

发明人： Walter Meinel ,  Kalin V. Lazarov

IPC分类号： H01L29/66 ,  H01L27/02

CPC分类号： H01L23/585 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/00

摘要： There has been very little (if any) attention to address contamination diffusion within an integrated circuit (IC) because there are very few applications where a protective overcoat will be penetrated as part of the manufacturing process. Here, a sealing ring is provided that address this problem. Preferably, the sealing ring uses the combination of electrically conductive barrier rings and the tortuous migration path to allow an electronic device (i.e., thermopile), where a protective overcoat is penetrated during manufacture, to communicate with external devices while being isolated to prevent contamination.

摘要翻译： 对于集成电路（IC）中的污染物扩散，注意力很少（如果有的话），因为在制造过程中保护外套将被穿透的应用非常少。 这里提供了一个解决这个问题的密封圈。 优选地，密封环使用导电阻挡环和曲折迁移路径的组合来允许在制造期间穿透保护性外涂层的电子设备（即，热电堆）在被隔离的同时与外部设备隔离以防止污染。

公开(公告)号：US20120139077A1

公开(公告)日：2012-06-07

申请号：US12962257

申请日：2010-12-07

申请人： Walter Meinel ,  Kalin V. Lazarov

发明人： Walter Meinel ,  Kalin V. Lazarov

IPC分类号： H01L23/433 ,  H01L21/56

CPC分类号： G01J5/12 ,  H01L23/3171 ,  H01L2924/0002 ,  H01L2924/00

摘要： Here, an apparatus is provided. The apparatus generally comprises a substrate and a thermopile. The thermopile includes a cavity that is etched into the substrate, a functional area that is formed over the substrate (where the cavity is generally coextensive with the functional area), and a metal ring formed over the substrate along the periphery of the functional area (where the metal ring is thermally coupled to the substrate).

摘要翻译： 这里，提供了一种装置。 该装置通常包括基板和热电堆。 热电堆包括蚀刻到衬底中的空腔，形成在衬底上的功能区域（其中空腔通常与功能区域共同延伸）以及沿功能区域周边形成在衬底上的金属环（ 其中金属环热耦合到衬底）。

公开(公告)号：US20120061570A1

公开(公告)日：2012-03-15

申请号：US12878752

申请日：2010-09-09

申请人： Walter Meinel ,  Kalin V. Lazarov

发明人： Walter Meinel ,  Kalin V. Lazarov

IPC分类号： H01L31/00 ,  H01L33/00

CPC分类号： G01J5/0225 ,  G01J5/12 ,  G01J5/14

摘要： In conventional membrane infrared (IR) sensors, little to no attention has been paid toward transmissivity of IR near metal traces. Here, because the substrate of an integrated circuit carrying the sensor is used as a visible light filter, reflection of IR radiation back into the substrate can affect the operation and reliability of the IR sensor. As a result, an arrangement is provided that reduces the area occupied by metal lines by reducing the pitch and compacting the routing so as to reduce the effects from the reflection of IR radiation by metal traces.

摘要翻译： 在传统的膜红外（IR）传感器中，几乎没有注意到金属痕迹附近的IR的透射率。 这里，由于携带传感器的集成电路的基板被用作可见光滤光器，所以将IR辐射反射回到基板中会影响IR传感器的操作和可靠性。 结果，提供了一种通过减小间距并压实路线来减少金属线所占据的面积的装置，以便减少由金属迹线反射IR辐射的影响。

公开(公告)号：US08586395B2

公开(公告)日：2013-11-19

申请号：US12962257

申请日：2010-12-07

申请人： Walter Meinel ,  Kalin V. Lazarov

发明人： Walter Meinel ,  Kalin V. Lazarov

IPC分类号： H01L31/024 ,  H01L31/101

CPC分类号： G01J5/12 ,  H01L23/3171 ,  H01L2924/0002 ,  H01L2924/00

摘要： Here, an apparatus is provided. The apparatus generally comprises a substrate and a thermopile. The thermopile includes a cavity that is etched into the substrate, a functional area that is formed over the substrate (where the cavity is generally coextensive with the functional area), and a metal ring formed over the substrate along the periphery of the functional area (where the metal ring is thermally coupled to the substrate).

摘要翻译： 这里，提供了一种装置。 该装置通常包括基板和热电堆。 热电堆包括蚀刻到衬底中的空腔，形成在衬底上的功能区域（其中空腔通常与功能区域共同延伸）以及沿功能区域周边形成在衬底上的金属环（ 其中金属环热耦合到衬底）。

公开(公告)号：US08436304B2

公开(公告)日：2013-05-07

申请号：US12878752

申请日：2010-09-09

申请人： Walter Meinel ,  Kalin V. Lazarov

发明人： Walter Meinel ,  Kalin V. Lazarov

IPC分类号： G01J5/00

CPC分类号： G01J5/0225 ,  G01J5/12 ,  G01J5/14

摘要： In conventional membrane infrared (IR) sensors, little to no attention has been paid toward transmissivity of IR near metal traces. Here, because the substrate of an integrated circuit carrying the sensor is used as a visible light filter, reflection of IR radiation back into the substrate can affect the operation and reliability of the IR sensor. As a result, an arrangement is provided that reduces the area occupied by metal lines by reducing the pitch and compacting the routing so as to reduce the effects from the reflection of IR radiation by metal traces.

摘要翻译： 在传统的膜红外（IR）传感器中，几乎没有注意到金属痕迹附近的IR的透射率。 这里，由于携带传感器的集成电路的基板被用作可见光滤光器，所以将IR辐射反射回到基板中会影响IR传感器的操作和可靠性。 结果，提供了一种通过减小间距并压实路线来减少金属线所占据的面积的装置，以便减少由金属迹线反射IR辐射的影响。