摘要:
A low power DC-DC converter includes a converter stage coupled to an input node, and having a low side switch and a rectifier switch. A peak current detector senses a current at the low side switch and a zero current detector senses a current at the rectifier switch. It is configured to set the low side switch to a non-conductive state and the rectifier switch to a conductive state if the peak current detector detects a predetermined peak current. It is configured to set the rectifier switch to a non-conductive state if the zero current detector detects zero current at the rectifier switch. A time interval between subsequent current peaks is triggered by a charge comparator receiving an average current fed to the low side and rectifier switches from the input node and a reference current coupled to the charge comparator by a reference current source.
摘要:
A low power DC-DC converter includes a converter stage coupled to an input node, and having a low side switch and a rectifier switch. A peak current detector senses a current at the low side switch and a zero current detector senses a current at the rectifier switch. It is configured to set the low side switch to a non-conductive state and the rectifier switch to a conductive state if the peak current detector detects a predetermined peak current. It is configured to set the rectifier switch to a non-conductive state if the zero current detector detects zero current at the rectifier switch. A time interval between subsequent current peaks is triggered by a charge comparator receiving an average current fed to the low side and rectifier switches from the input node and a reference current coupled to the charge comparator by a reference current source.
摘要:
A circuit arrangement 10 for driving an MOS field-effect transistor QO allocated to the supply circuit KO of an electrical load R.sub.L contains a charging circuit K1 and a discharging circuit K2, which can be alternatively connected to the MOS field-effect transistor QO. A sensing circuit K3 supplies the measuring signal S.sub.M typical of gate-source voltage U.sub.GS of the MOS field-effect transistor QO, via which the internal resistance of the charging or discharging circuit K1, K2 and/or a current I.sub.a impressed upon these circuits K1, K2, in the sense of a positive feedback, is controlled, in such a way that the resulting time constant, according to which the input capacitance of the MOS field-effect, transistor QO is charged or discharged, becomes smaller during the transition of the MOS field-effect transistor QO from the off state to the conductive state and larger during the transition from the conductive to the off-state.
摘要:
An electronic device for driving a power switch coupled to receive a first supply voltage level at one side of its channel is provided. The electronic device includes a control switch coupled with a first side of a channel to receive a varying control voltage having a maximum level that is greater than a maximum voltage level of the first voltage supply and with another side of the channel to a control gate of the power switch for selectively applying the control voltage to the control gate of the power switch. The first side of the channel is coupled with the control gate of the control switch and a capacitor is provided and coupled with a first side to the control gate of the control switch and with a second side to a constant voltage supply.
摘要:
A self-oscillating DC-DC buck converter with zero hysteresis is described. The converter comprises a comparator with a supply input, a non-inverting input to which a reference voltage is applied, an inverting input to which a feedback signal is applied, and an output to which a filter network is connected. The feedback signal is derived from the filter network and the output voltage of the converter is determined by the reference voltage. Connecting a filter network with an inductor and a capacitor to the output of the comparator and deriving the feedback signal from the filter network, results in an output of the comparator which is a DC output with a superimposed ripple. The level of the DC output is controlled by the reference voltage applied to the non-inverting input of the comparator, and the inductor current develops the ripple in the equivalent series resistance of the load circuit connected to the comparator output. The ripple can be regarded as the ramp signal in a conventional DC-DC converter. Accordingly, the output voltage is regulated to follow the reference voltage, and the proposed topology is equivalent to a DC-DC buck converter.
摘要:
A power supply circuit is proposed for supplying current to a pair of white LEDs connected in series. The circuit comprises a DC-DC power converter, with a charge pump coupled to the output of the DC-DC power converter. A super capacitor is coupled to the charge pump to be charged to a voltage on top of the converter output in a first mode of operation. The super capacitor is discharged through the pair of LEDs during a second mode of operation. A control stage is provided for switching between the first mode of operation and the second mode of operation.
摘要:
A buck-boost DC/DC converter includes an inductor and a power stage having a set of switches selectively connecting the inductor between a voltage input, a voltage output and a reference level in accordance with buck or boost mode. The converter has a switch control providing control signals to the set of switches in the power stage. A comparator provides to the switch control a first pulse width modulation signal in buck mode and a second pulse width modulation signal in boost mode. A ramp generator provides to the comparator a first ramp signal for buck mode and a second ramp signal for boost mode. An overlap control provides a ramp shift signal to the ramp generator in response to a detection signal that indicates activity of the switches in the power stage. The ramp shift signal adjusts the first and second ramp signals relative to each other so as to minimize any gap and any overlap between the first and second ramp signals. Whenever actuation of all switches in the power stage within the same clock period is detected, the ramp signals are adjusted in a way to reduce the overlap between the ramp signals. Conversely, when no switch activity is detected in a clock period, the ramp signals are adjusted in a waye to increase the overlap between the ramp signals. As a result, when the input voltage is close to the output voltage, the converter alternatively operates in buck mode or in boost mode, avoiding a buck-boost mode.
摘要:
A power switching circuit in CMOS technology has a power MOS transistor and a driver stage. The power MOS transistor is operated at a higher supply voltage in excess of its maximum allowable gate-source voltage; and the driver stage of the level shifter is operated at a lower supply voltage substantially lower than the supply voltage for the power MOS transistor. The driver stage includes a pair of driver MOS transistors coupled in series between a higher supply voltage rail and a reference potential rail, and at an interconnection node coupled to the gate of the power MOS transistor. The gates of the driver MOS transistors are AC-coupled to drive signals of mutually opposite phase; and the gates of the driver MOS transistors are each connected to the higher voltage supply rail through a respective parallel connection of a first resistor and a second resistor connected in series with a non-linear component. The resistance value of the second resistor is substantially smaller than the resistance value of the first resistor.
摘要:
A DC-DC boost converter comprises a charge pump selectively operating in a voltage doubler or in a voltage tripler mode. A switching arrangement connects the charge pump to an input voltage terminal in a charge phase and to an output voltage terminal in a discharge phase. A controllable current source is connected in series with the charge pump in the discharge phase and an error amplifier has a first input connected to a reference voltage, a second input connected to the output voltage terminal and an output connected to a control input of the controllable current source. The converter further comprises a mode changeover circuit with a first comparator having a first input connected to the output of the error amplifier and a second input connected to a first threshold voltage source. A second comparator has a first input connected to the output of the error amplifier and a second input connected to a second threshold voltage source. A flip-flop has its set input connected to the output of the first comparator, its reset input connected to the output of the second comparator. The flip-flop has its output connected to the switch arrangement to switch the charge pump from doubler mode to tripler mode when the voltage at the output of the error amplifier exceeds the second threshold voltage and back to doubler mode when the output voltage at the error amplifier drops below the first threshold voltage.
摘要:
An improved level shifter circuit with AC feed-forward is disclosed. The integrated circuit device includes a first circuit part biased from a lower voltage supply and a second circuit part biased from a higher voltage supply. One of the circuit parts has an RS flip-flop with two complementary signal outputs and the other one has a signal input and a first and a second switching transistor. The first and the second switching transistors each have a current channel DC coupled in series with a respective cascode-connected transistor which is connected to a respective one of the signal outputs. One of these outputs is coupled to the input through a first feed-forward AC series circuit of an inverter and a first coupling capacitor, and the other output is coupled to the input through a second feed-forward AC circuit including a second coupling capacitor.