公开(公告)号：US20190214070A1

公开(公告)日：2019-07-11

申请号：US16358414

申请日：2019-03-19

Applicant: Everspin Technologies, Inc.

Inventor： Jason JANESKY ,  Syed M. ALAM ,  Dimitri HOUSSAMEDDINE ,  Mark DEHERREA

IPC: G11C11/16 ,  G11C17/16 ,  G11C29/50 ,  G11C29/02 ,  G11C29/12

CPC classification number: G11C11/1673 ,  G11C11/16 ,  G11C11/1675 ,  G11C17/16 ,  G11C29/021 ,  G11C29/023 ,  G11C29/026 ,  G11C29/028 ,  G11C29/12 ,  G11C29/50

Abstract: Techniques and circuits for testing and configuring bias voltage or bias current for write operations in memory devices are presented. Registers and nonvolatile storage is included on the memory devices for storing values used to control testing of the memory devices as well as for configuring parameters related to both testing and normal operation.