公开(公告)号：US20170085294A1

公开(公告)日：2017-03-23

申请号：US14861354

申请日：2015-09-22

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： IGOR LEVACOV ,  HAIM BAREKET ,  ROI MENAHEM SHOR

IPC: H04B3/14 ,  H04B7/04

CPC classification number: H04B3/14 ,  H04B7/0413

Abstract: An equalizer comprises an equalizer circuit including a signal input to receive a first frequency-domain signal, another signal input to receive a second frequency-domain signal, and an equalized signal output to provide a first equalized signal based upon the first and second frequency-domain signals. Another equalizer circuit includes a signal input to receive a third frequency-domain signal, another signal input to receive a fourth frequency-domain signal, and an equalized signal output to provide a second equalized signal based upon the third and fourth frequency-domain signals. A third equalizer circuit includes a signal input coupled to the equalized signal output of the first equalizer circuit to receive the first equalized signal, another signal input coupled to the equalized signal output of the second equalizer circuit to receive the second equalized signal, and an equalized signal output to provide a third equalized signal based upon the first and second equalized signals.

公开(公告)号：US20160337154A1

公开(公告)日：2016-11-17

申请号：US14880738

申请日：2015-10-12

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： ROI MENAHEM SHOR ,  FREDERIC PAUL FERNEZ ,  AVRAHAM DOV GAL ,  PETER ZAHARIEV RASHEV

IPC: H04L27/26

CPC classification number: H04L27/2614 ,  H04L5/001 ,  H04L5/0064 ,  H04L5/0091 ,  H04L27/2624

Abstract: A digital front end channelization device for one or more carrier signals comprises a per carrier section and a composite section. The composite section may include signal processing units, each of which may include an inverse Fourier transform unit for transforming a composite carrier signal into a time domain signal, a sample detection and selection unit for detecting and selecting a peak of the time domain signal, a clipping unit for clipping the time domain composite carrier signal to produce an error signal, a Fourier transform unit for transforming the error signal into a frequency domain error signal, a frequency shaping unit for frequency shaping the frequency domain error signal, a summation unit for subtracting the frequency shaped frequency domain error signal from the composite carrier signal, and a phase selection unit for phase adjustment of the resulting signal.

Abstract translation: 用于一个或多个载波信号的数字前端信道化装置包括每载波部分和复合部分。 复合部分可以包括信号处理单元，每个信号处理单元可以包括用于将复合载波信号变换为时域信号的逆傅里叶变换单元，用于检测和选择时域信号的峰值的采样检测和选择单元， 剪辑单元，用于剪切时域复合载波信号以产生误差信号;傅里叶变换单元，用于将误差信号变换为频域误差信号;频率整形单元，用于对频域误差信号进行频率整形;求和单元，用于减去 来自复合载波信号的频域频域误差信号，以及用于相位调整所得信号的相位选择单元。

公开(公告)号：US20170294994A1

公开(公告)日：2017-10-12

申请号：US15092338

申请日：2016-04-06

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： ROI MENAHEM SHOR ,  AVI GAL ,  AVRAHAM HORN

IPC: H04L5/00 ,  H04W72/08 ,  H04L27/26 ,  H04W72/04

CPC classification number: H04L5/0007 ,  H04L27/2607 ,  H04W72/044 ,  H04W72/087 ,  H04W88/085

Abstract: The present application relates to a Common Public Radio Interface, CPRI, lane controller and a method of operating thereof. The CPRI lane controller comprises a transaction counter, a symbol counter and a comparator. The transaction counter is provided for maintaining a current aggregated transactions' size, Sizetrans, representative of an accumulated size of DMA transactions performed by a DMA controller in response to symbols transferred on a CPRI link from or to the CPRI lane controller. The symbol counter is provided for maintaining a current aggregated expected symbols' size, Sizeexp, representative of an accumulated size of a sequence of transferred symbols and a currently transferred symbol. The comparator is configured to issue a symbol awareness signal, SAS, in case the current aggregated transactions' size, Sizetrans, exceeds the current aggregated expected symbols' size, Sizeexp.

公开(公告)号：US20170048915A1

公开(公告)日：2017-02-16

申请号：US14824768

申请日：2015-08-12

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： ROI MENAHEM SHOR ,  AVRAHAM HORN ,  SHAY SHPRITZ

IPC: H04W76/04

CPC classification number: H04W76/19 ,  H04W24/04

Abstract: A method performed by a radio equipment control (REC) device, including storing values of link configuration registers of a radio equipment control (REC) device at shadow registers of the REC device in response to determining that a synchronization of a current communication link between the REC device and a radio equipment (RE) device has been lost. The method further including re-establishing the current communication link based on the values of the link configuration registers stored at the shadow registers of the REC device.

Abstract translation: 一种由无线电设备控制（REC）设备执行的方法，包括响应于确定在所述REC设备之间的当前通信链路的同步，在REC设备的影子寄存器处存储无线电设备控制（REC）设备的链路配置寄存器的值 REC设备和无线电设备（RE）设备已丢失。 该方法还包括基于存储在REC设备的影子寄存器处的链路配置寄存器的值重新建立当前通信链路。

公开(公告)号：US20170048910A1

公开(公告)日：2017-02-16

申请号：US14824684

申请日：2015-08-12

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： ROI MENAHEM SHOR ,  AVRAHAM HORN ,  SHAY SHPRITZ

IPC: H04W76/02 ,  H04L12/24

CPC classification number: H04L41/0803 ,  H04W24/04 ,  H04W88/08

Abstract: A method performed by a radio base station, the method including determining a link configuration of a first communication link, the first communication link being a current communication link between a first radio equipment control (REC) device and a radio equipment (RE) device. The method further including in response to determining that a second communication link between a second REC device and the RE device is to replace the current communication link, instead of the first communication link, establishing, by the second REC device, the second communication link based on the determined link configuration of the first communication link.

Abstract translation: 一种由无线基站执行的方法，所述方法包括确定第一通信链路的链路配置，所述第一通信链路是第一无线电设备控制（REC）设备和无线电设备（RE）设备之间的当前通信链路。 该方法还包括响应于确定第二REC设备和RE设备之间的第二通信链路取代当前通信链路而不是第一通信链路，由第二REC设备建立基于第二通信链路的第二通信链路 关于确定的第一通信链路的链路配置。