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    Process for manufacturing an array of cells including selection bipolar junction transistors
    2.
    发明授权
    Process for manufacturing an array of cells including selection bipolar junction transistors 有权
    用于制造包括选择双极结型晶体管的单元阵列的工艺

    公开(公告)号：US07563684B2

    公开(公告)日：2009-07-21

    申请号：US11264084

    申请日：2005-11-01

    申请人： Fabio Pellizzer ,  Giulio Casagrande ,  Roberto Gastaldi ,  Loris Vendrame ,  Augusto Benvenuti ,  Tyler Lowrey

    发明人： Fabio Pellizzer ,  Giulio Casagrande ,  Roberto Gastaldi ,  Loris Vendrame ,  Augusto Benvenuti ,  Tyler Lowrey

    IPC分类号： H01L21/8226

    CPC分类号： H01L29/685 ,  H01L27/101 ,  H01L27/24

    摘要： A process for manufacturing an array of cells, including: implanting, in a body of semiconductor material of a first conductivity type, a common conduction region of the first conductivity type; forming, in the body, above the common conduction region, a plurality of active area regions of a second conductivity type and a first doping level; forming, on top of the body, an insulating layer having first and second openings; implanting first portions of the active area regions through the first openings with a doping agent of the first conductivity type, thereby forming, in the active area regions, second conduction regions of the first conductivity type; implanting second portions of the active area regions through the second openings with a doping agent of the second conductivity type, thereby forming control contact regions of the second conductivity type and a second doping level, higher than the first doping level; forming, on top of the body, a plurality of storage components, each storage component having a terminal connected to a respective second conduction region.

    摘要翻译： 一种用于制造单元阵列的方法，包括：在第一导电类型的半导体材料的主体中注入第一导电类型的共同导电区域; 在体内在公共导电区域上形成第二导电类型和第一掺杂水平的多个有源区域区域; 在所述主体的顶部上形成具有第一和第二开口的绝缘层; 通过第一导电类型的掺杂剂将有源区域的第一部分注入第一开口，从而在有源区域中形成第一导电类型的第二导电区域; 通过第二导电类型的掺杂剂将有源区域的第二部分注入第二开口，由此形成高于第一掺杂级的第二导电类型和第二掺杂级的控制接触区; 在主体的顶部上形成多个存储部件，每个存储部件具有连接到相应的第二传导区域的端子。

    Memory device with unipolar and bipolar selectors
    4.
    发明授权
    Memory device with unipolar and bipolar selectors 有权
    具有单极和双极选择器的存储器件

    公开(公告)号：US07483296B2

    公开(公告)日：2009-01-27

    申请号：US11233464

    申请日：2005-09-22

    申请人： Ferdinando Bedeschi ,  Fabio Pellizzer ,  Augusto Benvenuti ,  Loris Vendrame ,  Paola Zuliani

    发明人： Ferdinando Bedeschi ,  Fabio Pellizzer ,  Augusto Benvenuti ,  Loris Vendrame ,  Paola Zuliani

    IPC分类号： G11C11/36

    CPC分类号： G11C13/0004 ,  G11C13/003 ,  G11C2213/76 ,  G11C2213/79

    摘要： A memory device is proposed. The memory device includes a plurality of memory cells, wherein each memory cell includes a storage element and a selector for selecting the corresponding storage element during a reading operation or a programming operation. The selector includes a unipolar element and a bipolar element. The memory device further includes control means for prevalently enabling the unipolar element during the reading operation or the bipolar element during the programming operation.

    摘要翻译： 提出了一种存储器件。 存储器件包括多个存储器单元，其中每个存储器单元包括存储元件和用于在读取操作或编程操作期间选择相应的存储元件的选择器。 选择器包括单极元件和双极元件。 存储器件还包括控制装置，用于在编程操作期间在读取操作或双极元件期间普遍使能单极元件。

    Self-Aligned Bipolar Junction Transistors
    6.
    发明申请
    Self-Aligned Bipolar Junction Transistors 审中-公开
    自对准双极结晶体管

    公开(公告)号：US20110084247A1

    公开(公告)日：2011-04-14

    申请号：US12969652

    申请日：2010-12-16

    申请人： Fabio Pellizzer ,  Roberto Bez ,  Paola Zuliani ,  Augusto Benvenuti

    发明人： Fabio Pellizzer ,  Roberto Bez ,  Paola Zuliani ,  Augusto Benvenuti

    IPC分类号： H01L45/00 ,  H01L27/082

    CPC分类号： H01L27/0623 ,  H01L21/8249 ,  H01L27/1022 ,  H01L27/24 ,  H01L29/66272

    摘要： A plurality of bipolar transistors are formed by forming a common conduction region, a plurality of control regions extending each in an own active areas on the common conduction region, a plurality of silicide protection strips, and at least one control contact region. Silicide regions are formed on the second conduction regions and the control contact region. The second conduction regions may be formed by selectively implanting a first conductivity type dopant areas on a first side of selected silicide protection strips. The control contact region is formed by selectively implanting an opposite conductivity type dopant on a second side of the selected silicide protection strips.

    摘要翻译： 通过形成公共导电区域，在公共导电区域上的自身有效区域中延伸的多个控制区域，多个硅化物保护带和至少一个控制接触区域来形成多个双极晶体管。 在第二导电区域和控制接触区域上形成硅化物区域。 可以通过在所选择的硅化物保护条的第一侧选择性地注入第一导电类型的掺杂剂区域来形成第二导电区域。 通过在所选择的硅化物保护带的第二侧选择性地注入相反的导电型掺杂剂来形成控制接触区域。

    Self-aligned bipolar junction transistors
    7.
    发明授权
    Self-aligned bipolar junction transistors 有权
    自对准双极结型晶体管

    公开(公告)号：US07875513B2

    公开(公告)日：2011-01-25

    申请号：US11411311

    申请日：2006-04-26

    申请人： Fabio Pellizzer ,  Roberto Bez ,  Paola Zuliani ,  Augusto Benvenuti

    发明人： Fabio Pellizzer ,  Roberto Bez ,  Paola Zuliani ,  Augusto Benvenuti

    IPC分类号： H01L21/82338

    CPC分类号： H01L27/0623 ,  H01L21/8249 ,  H01L27/1022 ,  H01L27/24 ,  H01L29/66272

    摘要： A plurality of bipolar transistors are formed by forming a common conduction region, a plurality of control regions extending each in an own active areas on the common conduction region, a plurality of silicide protection strips, and at least one control contact region. Silicide regions are formed on the second conduction regions and the control contact region. The second conduction regions may be formed by selectively implanting a first conductivity type dopant areas on a first side of selected silicide protection strips. The control contact region is formed by selectively implanting an opposite conductivity type dopant on a second side of the selected silicide protection strips.

    摘要翻译： 通过形成公共导电区域，在公共导电区域上的自身有效区域中延伸的多个控制区域，多个硅化物保护带和至少一个控制接触区域来形成多个双极晶体管。 在第二导电区域和控制接触区域上形成硅化物区域。 可以通过在所选择的硅化物保护条的第一侧选择性地注入第一导电类型的掺杂剂区域来形成第二导电区域。 通过在所选择的硅化物保护带的第二侧选择性地注入相反的导电型掺杂剂来形成控制接触区域。

    Self-aligned biopolar junction transistors
    9.
    发明申请
    Self-aligned biopolar junction transistors 有权
    自对准生物极结结晶体管

    公开(公告)号：US20070254446A1

    公开(公告)日：2007-11-01

    申请号：US11411311

    申请日：2006-04-26

    申请人： Fabio Pellizzer ,  Roberto Bez ,  Paola Zuliani ,  Augusto Benvenuti

    发明人： Fabio Pellizzer ,  Roberto Bez ,  Paola Zuliani ,  Augusto Benvenuti

    IPC分类号： H01L29/80 ,  H01L21/331

    CPC分类号： H01L27/0623 ,  H01L21/8249 ,  H01L27/1022 ,  H01L27/24 ,  H01L29/66272

    摘要： A plurality of bipolar transistors are formed by forming a common conduction region, a plurality of control regions extending each in an own active areas on the common conduction region, a plurality of silicide protection strips, and at least one control contact region. Silicide regions are formed on the second conduction regions and the control contact region. The second conduction regions may be formed by selectively implanting a first conductivity type dopant areas on a first side of selected silicide protection strips. The control contact region is formed by selectively implanting an opposite conductivity type dopant on a second side of the selected silicide protection strips.

    摘要翻译： 通过形成公共导电区域，在公共导电区域上的自身有效区域中延伸的多个控制区域，多个硅化物保护带和至少一个控制接触区域来形成多个双极晶体管。 在第二导电区域和控制接触区域上形成硅化物区域。 可以通过在所选择的硅化物保护条的第一侧选择性地注入第一导电类型的掺杂剂区域来形成第二导电区域。 通过在所选择的硅化物保护带的第二侧选择性地注入相反的导电型掺杂剂来形成控制接触区域。

    Fabricating bipolar junction select transistors for semiconductor memories
    10.
    发明授权
    Fabricating bipolar junction select transistors for semiconductor memories 有权
    制造用于半导体存储器的双极结选择晶体管

    公开(公告)号：US08076211B2

    公开(公告)日：2011-12-13

    申请号：US12912829

    申请日：2010-10-27

    申请人： Agostino Pirovano ,  Augusto Benvenuti ,  Fabio Pellizzer ,  Giorgio Servalli

    发明人： Agostino Pirovano ,  Augusto Benvenuti ,  Fabio Pellizzer ,  Giorgio Servalli

    IPC分类号： H01L21/8222 ,  H01L21/331

    CPC分类号： H01L29/73 ,  H01L27/24

    摘要： A bipolar junction transistor may act as a select device for a semiconductor memory. The bipolar junction transistor may be formed of a stack of base and collector layers. Sets of parallel trenches are formed in a first direction down to the base and in a second direction down to the collector. The trenches may be used to form local enhancement implants into the exposed portion of the base and collector in each trench. As a result of the local enhancement implants, in some embodiments, leakage current may be reduced, active current capability may be higher, gain may be higher, base resistance may be reduced, breakdown voltage may be increased, and parasitic effects with adjacent junctions may be reduced.

    摘要翻译： 双极结型晶体管可以用作半导体存储器的选择器件。 双极结晶体管可以由基极和集电极层的堆叠形成。 一组平行的沟槽沿着第一方向下降到底部并且沿着第二方向形成在收集器的下方。 沟槽可以用于在每个沟槽中的基底和收集器的暴露部分中形成局部增强植入物。 作为局部增强植入物的结果，在一些实施例中，泄漏电流可能降低，有效电流能力可能更高，增益可能更高，基极电阻可能降低，击穿电压可能增加，并且具有相邻接点的寄生效应 减少