公开(公告)号：US20180143633A1

公开(公告)日：2018-05-24

申请号：US15636081

申请日：2017-06-28

Applicant: Faraday&Future Inc.

Inventor： Anil Paryani ,  Michael Hong ,  Azis Umit Batur ,  Bibhrajit Halder ,  Hong S. Bae

IPC: G05D1/00 ,  G05D1/02 ,  B60W10/12 ,  B60W10/20 ,  B60W10/22 ,  B60W10/18 ,  B60W30/08 ,  H04L12/40

CPC classification number: G05D1/0088 ,  B60W10/12 ,  B60W10/18 ,  B60W10/20 ,  B60W10/22 ,  B60W30/08 ,  B60W2050/0292 ,  G05D1/0077 ,  G05D1/0246 ,  G05D1/0259 ,  G05D2201/0213 ,  G06F11/0757 ,  G06F11/1629 ,  H04L12/40013 ,  H04L2012/40215 ,  H04L2012/40273

Abstract: A multi-processor architecture for automated driving systems can be used to improve performance and provide design flexibility. For example, a multi-processor architecture can be used to implement command generation and safety functionality in different processors. The command generation processor can be a high performing processor compared with the safety processor. The safety processor can verify the safety of commands output from the command generation processor and provide additional I/O channels that are typically absent on high performing processors. Additionally, processing of some sensor data can be moved to expansion modules with additional processors to reduce bottlenecks and provide design flexibility for systems with different sensing requirements.