公开(公告)号：US20120092771A1

公开(公告)日：2012-04-19

申请号：US12906697

申请日：2010-10-18

申请人： Fei Liu ,  Qiqing (Christine) Ouyang ,  Keith Kwong Hon Wong

发明人： Fei Liu ,  Qiqing (Christine) Ouyang ,  Keith Kwong Hon Wong

IPC分类号： G02B5/18 ,  H01L21/30

CPC分类号： G02B5/18 ,  G02B5/1857 ,  G02B5/1866 ,  G02B6/124 ,  G02B2006/12107 ,  G03F7/2016 ,  H01L21/30

摘要： An embedded vertical optical grating, a semiconductor device including the embedded vertical optical grating and a method for forming the same. The method for forming the embedded optical grating within a substrate includes depositing a hard mask layer on the substrate, patterning at least one opening within the hard mask layer, vertically etching a plurality of scallops within the substrate corresponding to the at least one opening within the hard mask layer, removing the hard mask layer, and forming an oxide layer within the plurality of scallops to form the embedded vertical optical grating.

摘要翻译： 嵌入式垂直光栅，包括嵌入式垂直光栅的半导体器件及其形成方法。 用于在衬底内形成嵌入式光栅的方法包括在衬底上沉积硬掩模层，图案化硬掩模层内的至少一个开口，垂直蚀刻衬底内对应于在该掩模层内的至少一个开口的多个扇贝 硬掩模层，去除硬掩模层，以及在多个扇贝内形成氧化物层以形成嵌入的垂直光栅。

公开(公告)号：US20110083786A1

公开(公告)日：2011-04-14

申请号：US12575968

申请日：2009-10-08

申请人： Dechao Guo ,  Fei Liu ,  Leathen Shi ,  Keith Kwong Hon Wong

发明人： Dechao Guo ,  Fei Liu ,  Leathen Shi ,  Keith Kwong Hon Wong

IPC分类号： B29C65/78 ,  H01L21/683

CPC分类号： H01L21/6833 ,  B32B37/0007 ,  B32B2457/14 ,  Y10T156/1002

摘要： An electrostatic chuck includes an array of independently biased conductive chuck elements, an array of sensor-conductor assemblies, and/or a combination of an array of sensor-conductor assemblies and at least one motorized chuck. Conductive chuck elements, either standing alone or embedded in a sensor-conductor assembly, are independently biased electrostatically to compensate for bowing and/or warping of a substrate thereupon so that the substrate can be bonded with a planar surface. A single electrostatic chuck can be employed to reduce the bowing and warping of one of the two substrates to be bonded, or two electrostatic chucks can be employed to minimize the bowing and warping of two substrates to be bonded.

摘要翻译： 静电卡盘包括独立偏置的导电卡盘元件的阵列，传感器 - 导体组件的阵列，和/或传感器 - 导体组件阵列和至少一个电动卡盘的组合。 独立地或嵌入传感器 - 导体组件中的导电卡盘元件被静电地独立地偏置以补偿其上的衬底的弯曲和/或翘曲，使得衬底可以与平坦表面结合。 可以使用单个静电卡盘来减少要接合的两个基板中的一个的弯曲和翘曲，或者可以使用两个静电卡盘来最小化要接合的两个基板的弯曲和翘曲。

公开(公告)号：US08767299B2

公开(公告)日：2014-07-01

申请号：US12906697

申请日：2010-10-18

申请人： Fei Liu ,  Qiqing C. Quyang ,  Keith Kwong Hon Wong

发明人： Fei Liu ,  Qiqing C. Quyang ,  Keith Kwong Hon Wong

IPC分类号： G02B5/18 ,  H01L21/30

CPC分类号： G02B5/18 ,  G02B5/1857 ,  G02B5/1866 ,  G02B6/124 ,  G02B2006/12107 ,  G03F7/2016 ,  H01L21/30

摘要： An embedded vertical optical grating, a semiconductor device including the embedded vertical optical grating and a method for forming the same. The method for forming the embedded optical grating within a substrate includes depositing a hard mask layer on the substrate, patterning at least one opening within the hard mask layer, vertically etching a plurality of scallops within the substrate corresponding to the at least one opening within the hard mask layer, removing the hard mask layer, and forming an oxide layer within the plurality of scallops to form the embedded vertical optical grating.

摘要翻译： 嵌入式垂直光栅，包括嵌入式垂直光栅的半导体器件及其形成方法。 用于在衬底内形成嵌入式光栅的方法包括在衬底上沉积硬掩模层，图案化硬掩模层内的至少一个开口，垂直蚀刻衬底内对应于在该掩模层内的至少一个开口的多个扇贝 硬掩模层，去除硬掩模层，以及在多个扇贝内形成氧化物层以形成嵌入的垂直光栅。

公开(公告)号：US08605499B2

公开(公告)日：2013-12-10

申请号：US13092247

申请日：2011-04-22

申请人： Leland Chang ,  Michael A. Guillorn ,  Dechao Guo ,  Fei Liu ,  Keith Kwong Hon Wong

发明人： Leland Chang ,  Michael A. Guillorn ,  Dechao Guo ,  Fei Liu ,  Keith Kwong Hon Wong

IPC分类号： G11C11/50

CPC分类号： H03H9/2457 ,  G11C11/404 ,  G11C23/00 ,  H03H2009/02314

摘要： Systems and methods for operating a nanometer-scale cantilever beam with a gate electrode. An example system includes a drive circuit coupled to the gate electrode where a drive signal from the circuit may cause the beam to oscillate at or near the beam's resonance frequency. The drive signal includes an AC component, and may include a DC component as well. An alternative example system includes a nanometer-scale cantilever beam, where the beam oscillates to contact a plurality of drain regions.

摘要翻译： 用栅电极操作纳米级悬臂梁的系统和方法。 示例性系统包括耦合到栅电极的驱动电路，其中来自电路的驱动信号可以使光束在光束的共振频率处或其附近振荡。 驱动信号包括AC分量，并且还可以包括DC分量。 替代示例系统包括纳米级悬臂梁，其中光束振荡以接触多个漏极区域。

公开(公告)号：US20120312452A1

公开(公告)日：2012-12-13

申请号：US13591286

申请日：2012-08-22

申请人： Dechao Guo ,  Fei Liu ,  Leathen Shi ,  Keith Kwong Hon Wong

发明人： Dechao Guo ,  Fei Liu ,  Leathen Shi ,  Keith Kwong Hon Wong

IPC分类号： H01L21/683 ,  B32B41/00

CPC分类号： H01L21/6833 ,  B32B37/0007 ,  B32B2457/14 ,  Y10T156/1002

摘要： An electrostatic chuck includes an array of independently biased conductive chuck elements, an array of sensor-conductor assemblies, and/or a combination of an array of sensor-conductor assemblies and at least one motorized chuck. Conductive chuck elements, either standing alone or embedded in a sensor-conductor assembly, are independently biased electrostatically to compensate for bowing and/or warping of a substrate thereupon so that the substrate can be bonded with a planar surface. A single electrostatic chuck can be employed to reduce the bowing and warping of one of the two substrates to be bonded, or two electrostatic chucks can be employed to minimize the bowing and warping of two substrates to be bonded.

摘要翻译： 静电卡盘包括独立偏置的导电卡盘元件的阵列，传感器 - 导体组件的阵列，和/或传感器 - 导体组件阵列和至少一个电动卡盘的组合。 独立地或嵌入传感器 - 导体组件中的导电卡盘元件被静电地独立地偏置以补偿其上的衬底的弯曲和/或翘曲，使得衬底可以与平坦表面结合。 可以使用单个静电卡盘来减少要接合的两个基板中的一个的弯曲和翘曲，或者可以使用两个静电卡盘来最小化要接合的两个基板的弯曲和翘曲。

公开(公告)号：US20120268985A1

公开(公告)日：2012-10-25

申请号：US13092247

申请日：2011-04-22

申请人： Leland Chang ,  Michael A. Guillorn ,  Dechao Guo ,  Fei Liu ,  Keith Kwong Hon Wong

发明人： Leland Chang ,  Michael A. Guillorn ,  Dechao Guo ,  Fei Liu ,  Keith Kwong Hon Wong

IPC分类号： G11C11/50 ,  H03B5/30

CPC分类号： H03H9/2457 ,  G11C11/404 ,  G11C23/00 ,  H03H2009/02314

摘要： Systems and methods for operating a nanometer-scale cantilever beam with a gate electrode. An example system includes a drive circuit coupled to the gate electrode where a drive signal from the circuit may cause the beam to oscillate at or near the beam's resonance frequency. The drive signal includes an AC component, and may include a DC component as well. An alternative example system includes a nanometer-scale cantilever beam, where the beam oscillates to contact a plurality of drain regions.

摘要翻译： 用栅电极操作纳米级悬臂梁的系统和方法。 示例性系统包括耦合到栅电极的驱动电路，其中来自电路的驱动信号可以使光束在光束的共振频率处或其附近振荡。 驱动信号包括AC分量，并且还可以包括DC分量。 替代示例系统包括纳米级悬臂梁，其中光束振荡以接触多个漏极区域。

公开(公告)号：US20110037128A1

公开(公告)日：2011-02-17

申请号：US12541933

申请日：2009-08-15

申请人： Satya N. Chakravarti ,  Dechao Guo ,  Wilfried Ernst-August Haensch ,  Pranita Kulkarni ,  Fei Liu ,  Philip J. Oldiges ,  Keith Kwong Hon Wong

发明人： Satya N. Chakravarti ,  Dechao Guo ,  Wilfried Ernst-August Haensch ,  Pranita Kulkarni ,  Fei Liu ,  Philip J. Oldiges ,  Keith Kwong Hon Wong

IPC分类号： H01L27/06 ,  H01L21/8234

CPC分类号： H01L27/0629 ,  H01L21/82345

摘要： Method of forming a semiconductor device which includes the steps of obtaining a semiconductor substrate having a logic region and an STI region; sequentially depositing layers of high K material, metal gate, first silicon and hardmask; removing the hardmask and first silicon layers from the logic region; applying a second layer of silicon on the semiconductor substrate such that the logic region has layers of high K material, metal gate and second silicon and the STI region has layers of high K material, metal gate, first silicon, hardmask and second silicon. There may also be a second hardmask layer between the metal gate layer and the first silicon layer in the STI region. There may also be a hardmask layer between the metal gate layer and the first silicon layer in the STI region but no hardmask layer between the first and second layers of silicon in the STI region.

摘要翻译： 形成半导体器件的方法包括以下步骤：获得具有逻辑区域和STI区域的半导体衬底; 依次沉积高K材料，金属栅极，第一硅和硬掩模层; 从逻辑区域去除硬掩模和第一硅层; 在半导体衬底上施加第二层硅，使得逻辑区域具有高K材料，金属栅极和第二硅层，并且STI区域具有高K材料，金属栅极，第一硅，硬掩模和第二硅层。 也可以在STI区域中的金属栅极层和第一硅层之间存在第二硬掩模层。 在STI区域中的金属栅极层和第一硅层之间也可以存在硬掩模层，但在STI区域中的第一和第二硅层之间没有硬掩模层。

公开(公告)号：US08408262B2

公开(公告)日：2013-04-02

申请号：US12575968

申请日：2009-10-08

申请人： Dechao Guo ,  Fei Liu ,  Leathen Shi ,  Keith Kwong Hon Wong

发明人： Dechao Guo ,  Fei Liu ,  Leathen Shi ,  Keith Kwong Hon Wong

IPC分类号： B32B41/00

CPC分类号： H01L21/6833 ,  B32B37/0007 ,  B32B2457/14 ,  Y10T156/1002

摘要： An electrostatic chuck includes an array of independently biased conductive chuck elements, an array of sensor-conductor assemblies, and/or a combination of an array of sensor-conductor assemblies and at least one motorized chuck. Conductive chuck elements, either standing alone or embedded in a sensor-conductor assembly, are independently biased electrostatically to compensate for bowing and/or warping of a substrate thereupon so that the substrate can be bonded with a planar surface. A single electrostatic chuck can be employed to reduce the bowing and warping of one of the two substrates to be bonded, or two electrostatic chucks can be employed to minimize the bowing and warping of two substrates to be bonded.

摘要翻译： 静电卡盘包括独立偏置的导电卡盘元件的阵列，传感器 - 导体组件的阵列，和/或传感器 - 导体组件阵列和至少一个电动卡盘的组合。 独立地或嵌入传感器 - 导体组件中的导电卡盘元件被静电地独立地偏置以补偿其上的衬底的弯曲和/或翘曲，使得衬底可以与平坦表面结合。 可以使用单个静电卡盘来减少要接合的两个基板中的一个的弯曲和翘曲，或者可以使用两个静电卡盘来最小化要接合的两个基板的弯曲和翘曲。

公开(公告)号：US08053317B2

公开(公告)日：2011-11-08

申请号：US12541933

申请日：2009-08-15

申请人： Satya N. Chakravarti ,  Dechao Guo ,  Wilfried Ernst-August Haensch ,  Pranita Kulkarni ,  Fei Liu ,  Philip J. Oldiges ,  Keith Kwong Hon Wong

发明人： Satya N. Chakravarti ,  Dechao Guo ,  Wilfried Ernst-August Haensch ,  Pranita Kulkarni ,  Fei Liu ,  Philip J. Oldiges ,  Keith Kwong Hon Wong

IPC分类号： H01L21/8234

CPC分类号： H01L27/0629 ,  H01L21/82345

摘要： Method of forming a semiconductor device which includes the steps of obtaining a semiconductor substrate having a logic region and an STI region; sequentially depositing layers of high K material, metal gate, first silicon and hardmask; removing the hardmask and first silicon layers from the logic region; applying a second layer of silicon on the semiconductor substrate such that the logic region has layers of high K material, metal gate and second silicon and the STI region has layers of high K material, metal gate, first silicon, hardmask and second silicon. There may also be a second hardmask layer between the metal gate layer and the first silicon layer in the STI region. There may also be a hardmask layer between the metal gate layer and the first silicon layer in the STI region but no hardmask layer between the first and second layers of silicon in the STI region.

摘要翻译： 形成半导体器件的方法包括以下步骤：获得具有逻辑区域和STI区域的半导体衬底; 依次沉积高K材料，金属栅极，第一硅和硬掩模层; 从逻辑区域去除硬掩模和第一硅层; 在半导体衬底上施加第二层硅，使得逻辑区域具有高K材料，金属栅极和第二硅层，并且STI区域具有高K材料，金属栅极，第一硅，硬掩模和第二硅层。 也可以在STI区域中的金属栅极层和第一硅层之间存在第二硬掩模层。 在STI区域中的金属栅极层和第一硅层之间也可以存在硬掩模层，但在STI区域中的第一和第二硅层之间没有硬掩模层。

公开(公告)号：US10209853B2

公开(公告)日：2019-02-19

申请号：US15104695

申请日：2014-12-11

申请人： Robert Bosch GmbH ,  Fuliang Weng ,  Kui Xu ,  Fei Liu ,  Lin Zhao ,  Zhe Feng ,  Zhongnan Shen

发明人： Fuliang Weng ,  Kui Xu ,  Fei Liu ,  Lin Zhao ,  Zhe Feng ,  Zhongnan Shen

IPC分类号： G06F3/0481 ,  G06F9/451 ,  G06F3/01 ,  G06Q30/02 ,  G10L15/22 ,  G06F3/0488 ,  B60K35/00 ,  H04L29/06 ,  H04L29/08

摘要： An in-vehicle infotainment system, smart home information access and device control unit, or mobile system presents summarized information to a user based on a user preference model that is associated with the user. The system modifies the presentation of information to the user based on environmental context data about the vehicle and user context data about the activity of the user. During presentation of the information, the system modifies the content and presentation of the summarized information in response to multi-modal input requests from the user.