摘要:
A control circuit for a polarity inverting buck-boost DC-DC converter, includes an operational trans-conductance amplifier that has inputs to which a sensed voltage difference signal is applied and an output connected to an input of a voltage-to-duty-cycle converter. A compensation capacitance is connected between the output of the amplifier and a fixed supply terminal. The compensation capacitance includes a first capacitor that is permanently connected between the output of the amplifier and the fixed supply terminal and a second capacitor that has a switched connection between the output of the amplifier and the fixed supply terminal. The first capacitor has a small capacitance compared to the second capacitor. The switched connection of the second capacitor is controlled by a continuous-discontinuous mode detection circuit.
摘要:
A control circuit for a polarity inverting buck-boost DC-DC converter, includes an operational trans-conductance amplifier that has inputs to which a sensed voltage difference signal is applied and an output connected to an input of a voltage-to-duty-cycle converter. A compensation capacitance is connected between the output of the amplifier and a fixed supply terminal. The compensation capacitance includes a first capacitor that is permanently connected between the output of the amplifier and the fixed supply terminal and a second capacitor that has a switched connection between the output of the amplifier and the fixed supply terminal. The first capacitor has a small capacitance compared to the second capacitor. The switched connection of the second capacitor is controlled by a continuous-discontinuous mode detection circuit.
摘要:
The invention relates to a reference voltage source including a bipolar transistor having a base, a collector and an emitter electrode. The reference voltage source further comprises a Schottky diode (D) whose anode is connected to the base electrode of the bipolar transistor and whose cathode is connected to the collector electrode of the bipolar transistor. The currents flowing through the Schottky diode and bipolar transistor are each set so that a temperature-independent reference voltage (VREF) materializes at the collector electrode of the bipolar transistor.
摘要:
An electronic device comprising a level shifter and a method. The level shifter includes an input adapted to receive an input signal switching between a low input voltage level and a high input voltage level and a first switch and a second switch coupled in series between a low output voltage supply and a high output voltage supply. An output is coupled to an interconnection node between the first and the second switch and is adapted to be coupled to a load. The first and second switches are controlled by the input signal. The level shifter further includes a third switch which is coupled between the interconnection node and an auxiliary voltage supply which has a voltage level between the low output voltage level and the high output voltage level.
摘要:
A converter has a single inductor with a first terminal connectable to a first terminal of the supply input through a first power transistor and a second terminal connectable to a second terminal of the supply input through a second power transistor. A first rectifier element connects the first terminal of the inductor with a first output terminal, and a second rectifier element connects the second terminal of the inductor with a second output terminal. A resistive voltage divider is connected between the first and second output terminals. A control circuit uses an input from the voltage divider as a reference input voltage and provides an output current to the second terminal of the supply input in response to any voltage difference between the reference input voltage and the second terminal of the supply input. This provides a virtual common reference potential at the second terminal of the supply input, which is thus a common ground (GND) terminal. In the ON phase of both power transistors, the inductor is charged with current from the supply input. In the OFF phase (both power transistors are OFF), the energy stored in the inductor is supplied to both of the positive and the negative supply output through the rectifier elements, the output current in fact flowing almost exclusively between the positive and negative supply outputs. Thus, in the OFF phase, the inductor is entirely isolated from the supply input and the supply outputs are in no way affected by any transients or fluctuations in the supply input voltage.
摘要:
A level shifter for use in LCD display applications is provided which includes a group of separate channels each with a signal input and a signal output and with channel control circuitry supporting gate voltage shaping for improving image quality. The level shifter further has a number of flicker clock inputs. The channel control circuitry of each particular channel in the group comprises logic circuitry combining all of said flicker clock inputs with the signal input of the particular channel and signal inputs form other channels into a gate voltage shaping enable signal for the control circuitry of the particular channel. With this configuration it is possible to use the same level shifter IC with only one flicker clock signal for all phases, regardless of how many, without the need for an additional synchronization signal, or multiple flicker clock signals as is conventional. The level shifter automatically determines which input signal needs to be modified for the gate voltage shaping when the active portion of the flicker clock signal is detected.
摘要:
A DC-DC high frequency boost converter with a supply voltage input (110), a boosted voltage output (112), a series circuit of an inductor (114) and a rectifying device (116) connected in series between said supply voltage input (110) and said boosted voltage output (112), has a switch (124) connected between ground and a connection node (120) of said inductor (114) and said rectifying device (116). A control circuit (126) is provided for controlling said switch (124), and a zero inductor current detection circuit (128) is provided that compares a voltage (Un) on said connection node (120) with a reference voltage (Uref) and provides a zero inductor current indication (Comp) when both voltages are equal.
摘要翻译:一种具有电源电压输入(110),升压电压输出(112),电感器(114)和整流装置(116)的串联电路的DC-DC高频升压转换器,串联连接在所述电源电压输入 110)和所述升压电压输出(112)具有连接在地与所述电感器(114)和所述整流装置(116)的连接节点(120)之间的开关(124)。 提供控制电路(126)用于控制所述开关(124),并且提供零电感器电流检测电路(128),其比较所述连接节点(120)上的电压(U SUB n N) 具有参考电压(U SUB ref),并且当两个电压相等时提供零电感器电流指示(Comp)。
摘要:
The circuit configuration for the generation of a reference voltage (Vref) contains a reference voltage source (12) and a storage capacitor (C2) to which a voltage provided by a reference voltage source (12) can be applied via a controllable switch. The charging voltage of this storage capacitor (C1) is the reference voltage to be generated. The controllable switch (P1) is a MOS field-effect transistor with back gate (24) which, by means of a refresh signal supplied by a control circuit (22), can be put periodically into either a conducting or a non-conducting state. The back gate (24) of the MOS fieldeffect transistor (P1) is connected to an auxiliary storage capacitor (C2) to which the voltage supplied by the reference voltage source (12) can be applied via a further switch, consisting of a MOS field-effect transistor (P2) with back gate (26), and which is also controlled by the refresh signal. The back gate (26) of the further MOS field-effect transistor (P2) is connected to a fixed voltage, which is greater than the voltage supplied by the reference voltage source (12).
摘要:
A digital driver circuit with one or more CMOS inverters intended as input stages, whereby for the MOS FETs of the inverters the channel width/length (W/L) ratio increases from stage to stage. The digital driver circuit includes an intermediate stage with two further CMOS inverters, connected between a supply voltage Vcc and ground. The driver circuit also includes an output stage having two MOS FETs with the drain terminals of both the MOS FETs of the output stage connected both to each other and to the output of the circuit, the W/L ratio of both MOS FETs exceeding that of the MOS FETs of the intermediate stage. The switch-over of the two MOS FETs of the output stage, occurring with changes of the digital input signal at the input of the circuit, is offset in time with respect to each other, thereby reducing current peaks.
摘要:
An electronic device comprising a level shifter and a method. The level shifter includes an input adapted to receive an input signal switching between a low input voltage level and a high input voltage level and a first switch and a second switch coupled in series between a low output voltage supply and a high output voltage supply. An output is coupled to an interconnection node between the first and the second switch and is adapted to be coupled to a load. The first and second switches are controlled by the input signal. The level shifter further includes a third switch which is coupled between the interconnection node and an auxiliary voltage supply which has a voltage level between the low output voltage level and the high output voltage level.