Control circuit for a polarity inverting buck-boost DC-DC converter

    公开(公告)号:US20060012355A1

    公开(公告)日:2006-01-19

    申请号:US11132899

    申请日:2005-05-19

    IPC分类号: G05F1/56

    摘要: A control circuit for a polarity inverting buck-boost DC-DC converter, includes an operational trans-conductance amplifier that has inputs to which a sensed voltage difference signal is applied and an output connected to an input of a voltage-to-duty-cycle converter. A compensation capacitance is connected between the output of the amplifier and a fixed supply terminal. The compensation capacitance includes a first capacitor that is permanently connected between the output of the amplifier and the fixed supply terminal and a second capacitor that has a switched connection between the output of the amplifier and the fixed supply terminal. The first capacitor has a small capacitance compared to the second capacitor. The switched connection of the second capacitor is controlled by a continuous-discontinuous mode detection circuit.

    Control circuit for a polarity inverting buck-boost DC-DC converter
    2.
    发明授权
    Control circuit for a polarity inverting buck-boost DC-DC converter 有权
    极性反相降压 - 升压型DC-DC转换器的控制电路

    公开(公告)号:US07595616B2

    公开(公告)日:2009-09-29

    申请号:US11132899

    申请日:2005-05-19

    IPC分类号: G05F1/00

    摘要: A control circuit for a polarity inverting buck-boost DC-DC converter, includes an operational trans-conductance amplifier that has inputs to which a sensed voltage difference signal is applied and an output connected to an input of a voltage-to-duty-cycle converter. A compensation capacitance is connected between the output of the amplifier and a fixed supply terminal. The compensation capacitance includes a first capacitor that is permanently connected between the output of the amplifier and the fixed supply terminal and a second capacitor that has a switched connection between the output of the amplifier and the fixed supply terminal. The first capacitor has a small capacitance compared to the second capacitor. The switched connection of the second capacitor is controlled by a continuous-discontinuous mode detection circuit.

    摘要翻译: 用于极性反转降压 - 升压DC-DC转换器的控制电路包括具有输入的操作跨导放大器,感测的电压差信号被施加到输入端,并且输出端连接到电压 - 占空比的输入 转换器。 补偿电容连接在放大器的输出端和固定电源端子之间。 补偿电容包括永久连接在放大器的输出端和固定电源端子之间的第一电容器和在放大器的输出端与固定电源端子之间具有开关连接的第二电容器。 与第二电容器相比,第一电容器具有小的电容。 第二电容器的开关连接由连续不连续模式检测电路控制。

    Reference voltage source
    3.
    发明授权
    Reference voltage source 有权
    参考电压源

    公开(公告)号:US06737848B2

    公开(公告)日:2004-05-18

    申请号:US10294120

    申请日:2002-11-14

    IPC分类号: G05F316

    CPC分类号: G05F3/22

    摘要: The invention relates to a reference voltage source including a bipolar transistor having a base, a collector and an emitter electrode. The reference voltage source further comprises a Schottky diode (D) whose anode is connected to the base electrode of the bipolar transistor and whose cathode is connected to the collector electrode of the bipolar transistor. The currents flowing through the Schottky diode and bipolar transistor are each set so that a temperature-independent reference voltage (VREF) materializes at the collector electrode of the bipolar transistor.

    摘要翻译: 本发明涉及一种包括具有基极,集电极和发射极的双极晶体管的参考电压源。 参考电压源还包括其阳极连接到双极晶体管的基极并且其阴极连接到双极晶体管的集电极的肖特基二极管(D)。 流过肖特基二极管和双极晶体管的电流各自被设定为使得独立于温度的参考电压(VREF)在双极晶体管的集电极处实现。

    Electronic device and method for providing a digital signal at a level shifter output
    4.
    发明授权
    Electronic device and method for providing a digital signal at a level shifter output 有权
    用于在电平移位器输出端提供数字信号的电子设备和方法

    公开(公告)号:US08674744B2

    公开(公告)日:2014-03-18

    申请号:US13289867

    申请日:2011-11-04

    IPC分类号: H03L5/00

    CPC分类号: H03K19/018521 H03K19/0013

    摘要: An electronic device comprising a level shifter and a method. The level shifter includes an input adapted to receive an input signal switching between a low input voltage level and a high input voltage level and a first switch and a second switch coupled in series between a low output voltage supply and a high output voltage supply. An output is coupled to an interconnection node between the first and the second switch and is adapted to be coupled to a load. The first and second switches are controlled by the input signal. The level shifter further includes a third switch which is coupled between the interconnection node and an auxiliary voltage supply which has a voltage level between the low output voltage level and the high output voltage level.

    摘要翻译: 一种电子装置,包括电平转换器和方法。 电平移位器包括适于接收在低输入电压电平和高输入电压电平之间切换的输入信号的输入和串联耦合在低输出电压源和高输出电压电源之间的第一开关和第二开关。 输出耦合到第一和第二开关之间的互连节点,并且适于耦合到负载。 第一和第二开关由输入信号控制。 电平移位器还包括耦合在互连节点和具有低输出电压电平和高输出电压电平之间的电压电平的辅助电压源的第三开关。

    DC-DC converter usable for dual voltage supply
    5.
    发明授权
    DC-DC converter usable for dual voltage supply 有权
    DC-DC转换器可用于双电压供电

    公开(公告)号:US07999521B2

    公开(公告)日:2011-08-16

    申请号:US12235309

    申请日:2008-09-22

    IPC分类号: G05F1/577 G05F1/40

    摘要: A converter has a single inductor with a first terminal connectable to a first terminal of the supply input through a first power transistor and a second terminal connectable to a second terminal of the supply input through a second power transistor. A first rectifier element connects the first terminal of the inductor with a first output terminal, and a second rectifier element connects the second terminal of the inductor with a second output terminal. A resistive voltage divider is connected between the first and second output terminals. A control circuit uses an input from the voltage divider as a reference input voltage and provides an output current to the second terminal of the supply input in response to any voltage difference between the reference input voltage and the second terminal of the supply input. This provides a virtual common reference potential at the second terminal of the supply input, which is thus a common ground (GND) terminal. In the ON phase of both power transistors, the inductor is charged with current from the supply input. In the OFF phase (both power transistors are OFF), the energy stored in the inductor is supplied to both of the positive and the negative supply output through the rectifier elements, the output current in fact flowing almost exclusively between the positive and negative supply outputs. Thus, in the OFF phase, the inductor is entirely isolated from the supply input and the supply outputs are in no way affected by any transients or fluctuations in the supply input voltage.

    摘要翻译: A转换器具有单个电感器,第一端子可通过第一功率晶体管连接到电源输入的第一端子,第二端子可通过第二功率晶体管连接到电源输入端的第二端子。 第一整流器元件将电感器的第一端子与第一输出端子连接,第二整流器元件将电感器的第二端子与第二输出端子连接。 电阻分压器连接在第一和第二输出端子之间。 控制电路使用来自分压器的输入作为参考输入电压,并且响应于参考输入电压和电源输入的第二端之间的任何电压差,向电源输入的第二端提供输出电流。 这在供电输入的第二端子处提供虚拟公共参考电位,因此是公共地(GND)端子。 在两个功率晶体管的ON阶段,电感器从电源输入端接入电流。 在OFF阶段(两个功率晶体管关闭),存储在电感器中的能量通过整流元件被提供给正电源和负电源两端,实际上输出电流几乎完全在正和负电源输出之间流动 。 因此,在OFF阶段,电感器与电源输入完全隔离,电源输出不受电源输入电压瞬变或波动的影响。

    Level shifter for use in LCD display applications
    6.
    发明授权
    Level shifter for use in LCD display applications 有权
    液位移位器用于LCD显示应用

    公开(公告)号:US08390556B2

    公开(公告)日:2013-03-05

    申请号:US13022317

    申请日:2011-02-07

    IPC分类号: G09G3/36

    摘要: A level shifter for use in LCD display applications is provided which includes a group of separate channels each with a signal input and a signal output and with channel control circuitry supporting gate voltage shaping for improving image quality. The level shifter further has a number of flicker clock inputs. The channel control circuitry of each particular channel in the group comprises logic circuitry combining all of said flicker clock inputs with the signal input of the particular channel and signal inputs form other channels into a gate voltage shaping enable signal for the control circuitry of the particular channel. With this configuration it is possible to use the same level shifter IC with only one flicker clock signal for all phases, regardless of how many, without the need for an additional synchronization signal, or multiple flicker clock signals as is conventional. The level shifter automatically determines which input signal needs to be modified for the gate voltage shaping when the active portion of the flicker clock signal is detected.

    摘要翻译: 提供了一种用于LCD显示应用的电平转换器,其包括一组单独的通道,每个通道具有信号输入和信号输出,以及支持栅极电压整形的通道控制电路,以提高图像质量。 电平移位器还具有多个闪烁时钟输入。 组中每个特定通道的通道控制电路包括逻辑电路,其将所有闪烁时钟输入与特定通道的信号输入组合,并将信号输入从其它通道组合成用于特定通道的控制电路的栅极电压整形使能信号 。 利用这种配置,可以使用相同的电平移位器IC,对于所有相位仅使用一个闪烁时钟信号,而不管多少,而不需要额外的同步信号,或者像传统的多个闪烁时钟信号。 当检测到闪烁时钟信号的有效部分时,电平移位器自动确定需要修改哪个输入信号用于栅极电压整形。

    DC-DC high frequency boost converter
    7.
    发明申请
    DC-DC high frequency boost converter 有权
    DC-DC高频升压转换器

    公开(公告)号:US20050242788A1

    公开(公告)日:2005-11-03

    申请号:US11115524

    申请日:2005-04-26

    申请人: Stefan Reithmaier

    发明人: Stefan Reithmaier

    IPC分类号: H02M3/156 G05F1/10

    摘要: A DC-DC high frequency boost converter with a supply voltage input (110), a boosted voltage output (112), a series circuit of an inductor (114) and a rectifying device (116) connected in series between said supply voltage input (110) and said boosted voltage output (112), has a switch (124) connected between ground and a connection node (120) of said inductor (114) and said rectifying device (116). A control circuit (126) is provided for controlling said switch (124), and a zero inductor current detection circuit (128) is provided that compares a voltage (Un) on said connection node (120) with a reference voltage (Uref) and provides a zero inductor current indication (Comp) when both voltages are equal.

    摘要翻译: 一种具有电源电压输入(110),升压电压输出(112),电感器(114)和整流装置(116)的串联电路的DC-DC高频升压转换器,串联连接在所述电源电压输入 110)和所述升压电压输出(112)具有连接在地与所述电感器(114)和所述整流装置(116)的连接节点(120)之间的开关(124)。 提供控制电路(126)用于控制所述开关(124),并且提供零电感器电流检测电路(128),其比较所述连接节点(120)上的电压(U SUB n N) 具有参考电压(U SUB ref),并且当两个电压相等时提供零电感器电流指示(Comp)。

    Circuit configuration for the generation of a reference voltage

    公开(公告)号:US06603295B2

    公开(公告)日:2003-08-05

    申请号:US10051239

    申请日:2002-01-18

    IPC分类号: G05F316

    CPC分类号: G05F1/565

    摘要: The circuit configuration for the generation of a reference voltage (Vref) contains a reference voltage source (12) and a storage capacitor (C2) to which a voltage provided by a reference voltage source (12) can be applied via a controllable switch. The charging voltage of this storage capacitor (C1) is the reference voltage to be generated. The controllable switch (P1) is a MOS field-effect transistor with back gate (24) which, by means of a refresh signal supplied by a control circuit (22), can be put periodically into either a conducting or a non-conducting state. The back gate (24) of the MOS fieldeffect transistor (P1) is connected to an auxiliary storage capacitor (C2) to which the voltage supplied by the reference voltage source (12) can be applied via a further switch, consisting of a MOS field-effect transistor (P2) with back gate (26), and which is also controlled by the refresh signal. The back gate (26) of the further MOS field-effect transistor (P2) is connected to a fixed voltage, which is greater than the voltage supplied by the reference voltage source (12).

    Digital driver circuit
    9.
    发明授权
    Digital driver circuit 有权
    数字驱动电路

    公开(公告)号:US06492847B1

    公开(公告)日:2002-12-10

    申请号:US09689078

    申请日:2000-10-12

    IPC分类号: H03B100

    CPC分类号: H03K19/0013 H03K5/133

    摘要: A digital driver circuit with one or more CMOS inverters intended as input stages, whereby for the MOS FETs of the inverters the channel width/length (W/L) ratio increases from stage to stage. The digital driver circuit includes an intermediate stage with two further CMOS inverters, connected between a supply voltage Vcc and ground. The driver circuit also includes an output stage having two MOS FETs with the drain terminals of both the MOS FETs of the output stage connected both to each other and to the output of the circuit, the W/L ratio of both MOS FETs exceeding that of the MOS FETs of the intermediate stage. The switch-over of the two MOS FETs of the output stage, occurring with changes of the digital input signal at the input of the circuit, is offset in time with respect to each other, thereby reducing current peaks.

    摘要翻译: 具有一个或多个CMOS反相器的数字驱动器电路,用作输入级,由此对于反相器的MOS FET,沟道宽度/长度(W / L)比从阶段增加到阶段。 数字驱动器电路包括一个中间级,其中两个另外的CMOS反相器连接在电源电压Vcc和地之间。 驱动器电路还包括具有两个MOS FET的输出级,其输出级的两个MOS FET的漏极端子彼此连接,并连接到电路的输出端,两个MOS FET的W / L比超过 中间阶段的MOS FET。 随着电路输入端的数字输入信号的变化而发生的输出级的两个MOS FET的切换在时间上相对于彼此偏移,从而减小电流峰值。

    ELECTRONIC DEVICE AND METHOD FOR PROVIDING A DIGITAL SIGNAL AT A LEVEL SHIFTER OUTPUT
    10.
    发明申请
    ELECTRONIC DEVICE AND METHOD FOR PROVIDING A DIGITAL SIGNAL AT A LEVEL SHIFTER OUTPUT 有权
    用于在水平移位输出端提供数字信号的电子设备和方法

    公开(公告)号:US20130113540A1

    公开(公告)日:2013-05-09

    申请号:US13289867

    申请日:2011-11-04

    IPC分类号: H03L5/00

    CPC分类号: H03K19/018521 H03K19/0013

    摘要: An electronic device comprising a level shifter and a method. The level shifter includes an input adapted to receive an input signal switching between a low input voltage level and a high input voltage level and a first switch and a second switch coupled in series between a low output voltage supply and a high output voltage supply. An output is coupled to an interconnection node between the first and the second switch and is adapted to be coupled to a load. The first and second switches are controlled by the input signal. The level shifter further includes a third switch which is coupled between the interconnection node and an auxiliary voltage supply which has a voltage level between the low output voltage level and the high output voltage level.

    摘要翻译: 一种电子装置,包括电平转换器和方法。 电平移位器包括适于接收在低输入电压电平和高输入电压电平之间切换的输入信号的输入和串联耦合在低输出电压源和高输出电压电源之间的第一开关和第二开关。 输出耦合到第一和第二开关之间的互连节点,并且适于耦合到负载。 第一和第二开关由输入信号控制。 电平移位器还包括耦合在互连节点和具有低输出电压电平和高输出电压电平之间的电压电平的辅助电压源的第三开关。