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47 条记录 (耗时 0.03 秒)

    Semiconductor contact via structure
    6.
    发明授权
    Semiconductor contact via structure 失效
    半导体接触通孔结构

    公开(公告)号：US5841195A

    公开(公告)日：1998-11-24

    申请号：US448703

    申请日：1995-05-24

    申请人： Yih-Shung Lin ,  Lun-Tseng Lu ,  Fu-Tai Liou ,  Che-Chia Wei ,  John Leonard Walters

    发明人： Yih-Shung Lin ,  Lun-Tseng Lu ,  Fu-Tai Liou ,  Che-Chia Wei ,  John Leonard Walters

    IPC分类号： H01L21/28 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/532

    CPC分类号： H01L23/485 ,  H01L21/76804 ,  H01L2924/0002

    摘要： A method is provided for forming contact via in an integrated circuit. Initially, a first buffer layer is formed over an insulating layer in an integrated circuit. The first buffer layer has a different etch rate from the insulating layer. A second buffer layer is then formed over the first buffer layer, with the second buffer layer having an etch rate which is faster than the first buffer layer. An isotropic etch is performed to create an opening through the second buffer layer and a portion of the first buffer layer. Because the second buffer layer etches faster than the first buffer layer, the slant of the sideswalls of the opening can be controlled. An anisotropic etch is then performed to complete formation of the contact via.

    摘要翻译： 提供了一种用于在集成电路中形成接触通孔的方法。 首先，在集成电路中的绝缘层上形成第一缓冲层。 第一缓冲层具有与绝缘层不同的蚀刻速率。 然后在第一缓冲层上形成第二缓冲层，其中第二缓冲层具有比第一缓冲层快的蚀刻速率。 执行各向同性蚀刻以产生通过第二缓冲层和第一缓冲层的一部分的开口。 因为第二缓冲层比第一缓冲层蚀刻更快，所以可以控制开口的侧壁的倾斜。 然后进行各向异性蚀刻以完成接触通孔的形成。

    Semiconductor contact via structure having amorphous silicon side walls
    8.
    发明授权
    Semiconductor contact via structure having amorphous silicon side walls 失效
    具有非晶硅侧壁的半导体接触通孔结构

    公开(公告)号：US5317192A

    公开(公告)日：1994-05-31

    申请号：US879190

    申请日：1992-05-06

    申请人： Fusen E. Chen ,  Girish A. Dixit ,  Che-Chia Wei

    发明人： Fusen E. Chen ,  Girish A. Dixit ,  Che-Chia Wei

    IPC分类号： H01L21/28 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/400

    CPC分类号： H01L23/5226 ,  H01L21/76801 ,  H01L21/76804 ,  H01L21/76814 ,  H01L21/76831 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002

    摘要： A method is provided for forming an integrated circuit contact structure. A conductive region is formed on a semiconductor device. Thereafter an insulating layer is formed over the conductive region. An opening is then formed through the insulating region to the conductive region. A thin barrier layer is deposited over the integrated circuit contact structure. A portion of the thin barrier layer is removed by backsputtering the integrated circuit contact structure so that only a thin barrier sidewall remains. Finally, a conductive metal layer is deposited over the integrated circuit contact structure. In one embodiment, the integrated circuit contact structure is baked before the conductive metal layer is deposited.

    摘要翻译： 提供了一种用于形成集成电路接触结构的方法。 在半导体器件上形成导电区域。 此后，在导电区域上形成绝缘层。 然后通过绝缘区域形成到导电区域的开口。 薄的势垒层沉积在集成电路接触结构上。 通过反向溅射集成电路接触结构来去除薄势垒层的一部分，使得只有薄的阻挡侧壁保留。 最后，在集成电路接触结构上沉积导电金属层。 在一个实施例中，在沉积导电金属层之前烘烤集成电路接触结构。

    Semiconductor contact via structure and method
    9.
    发明授权
    Semiconductor contact via structure and method 失效
    半导体接触通过结构和方法

    公开(公告)号：US5444019A

    公开(公告)日：1995-08-22

    申请号：US157571

    申请日：1993-11-24

    申请人： Fusen E. Chen ,  Girish A. Dixit ,  Che-Chia Wei

    发明人： Fusen E. Chen ,  Girish A. Dixit ,  Che-Chia Wei

    IPC分类号： H01L21/28 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/70 ,  H01L27/00

    CPC分类号： H01L23/5226 ,  H01L21/76801 ,  H01L21/76804 ,  H01L21/76814 ,  H01L21/76831 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002

    摘要： A method is provided for forming an integrated circuit contact structure. A conductive region is formed on a semiconductor device. Thereafter an insulating layer is formed over the conductive region. An opening is then formed through the insulating region to the conductive region. A thin barrier layer is deposited over the integrated circuit contact structure. A portion of the thin barrier layer is removed by backsputtering the integrated circuit contact structure so that only a thin barrier sidewall remains. Finally, a conductive metal layer is deposited over the integrated circuit contact structure. In one embodiment, the integrated circuit contact structure is baked before the conductive metal layer is deposited.

    摘要翻译： 提供了一种用于形成集成电路接触结构的方法。 在半导体器件上形成导电区域。 此后，在导电区域上形成绝缘层。 然后通过绝缘区域形成到导电区域的开口。 薄的势垒层沉积在集成电路接触结构上。 通过反向溅射集成电路接触结构来去除薄势垒层的一部分，使得只有薄的阻挡侧壁保留。 最后，在集成电路接触结构上沉积导电金属层。 在一个实施例中，在沉积导电金属层之前烘烤集成电路接触结构。

    Local interconnect for integrated circuits
    10.
    发明授权
    Local interconnect for integrated circuits 失效
    集成电路的本地互连

    公开(公告)号：US5124280A

    公开(公告)日：1992-06-23

    申请号：US648554

    申请日：1991-01-31

    申请人： Che-Chia Wei ,  Fu-Tai Liou

    发明人： Che-Chia Wei ,  Fu-Tai Liou

    IPC分类号： H01L21/28 ,  H01L21/768 ,  H01L23/532

    CPC分类号： H01L23/53271 ,  H01L21/76889 ,  H01L21/76895 ,  H01L2924/0002

    摘要： Local interconnect is defined in a polycrystalline silicon layer. Openings to underlying conducting regions are made through an insulating layer after the local interconnect conductor definition. A thin extra polycrystalline silicon layer is then deposited over the device and etched back to form polycrystalline silicon sidewall elements. These sidewalls connect the polycrystalline silicon local interconnect conductors to the underlying conductive regions. Standard silicidation techniques are then used to form a refractory metal silicide on the exposed underlying conductive regions, the polycrystalline silicon sidewall elements, and the polycrystalline silicon local interconnect conductors. This results in a complete silicided connection between features connected by the local interconnect conductors.