公开(公告)号：US09658853B2

公开(公告)日：2017-05-23

申请号：US14448790

申请日：2014-07-31

Applicant: GLOBALFOUNDRIES INC

Inventor： Harry Barowski ,  Tim Niggemeier

IPC: G06F9/30 ,  G06F9/38 ,  G06F5/14

CPC classification number: G06F9/3012 ,  G06F5/14 ,  G06F9/30043 ,  G06F9/30145 ,  G06F9/3826 ,  G06F9/3857

Abstract: A technique for operating a processor includes storing a first result to a writeback buffer, in response to a first execution unit of the processor attempting to write the first result of a first completed instruction to a register file of the processor at a same processor time as a second execution unit of the processor is attempting to write a second result of a second completed instruction to the register file. The writeback buffer is positioned in a dataflow between the first execution unit and the register file. A buffer full indicator logic is used to detect that the writeback buffer is unavailable. A buffer unavailable signal is transmitted, from the buffer full indicator logic, in response to detecting the writeback buffer is unavailable. In response to receiving the buffer unavailable signal, a buffer retrieving logic writes the first result from the writeback buffer to the register file.

公开(公告)号：US09337122B2

公开(公告)日：2016-05-10

申请号：US14633069

申请日：2015-02-26

Applicant: GLOBALFOUNDRIES INC.

Inventor： Harry Barowski ,  Thomas Brunschwiler ,  Roger F. Dangel ,  Hubert Harrer ,  Andreas Huber ,  Norbert M. Meier ,  Bruno Michel ,  Tim Niggemeier ,  Stephan Paredes ,  Jochen Supper ,  Jonas R. Weiss

IPC: G02B6/12 ,  H01L23/367 ,  G02B6/42 ,  G02B6/43 ,  G02B6/122 ,  G06F17/50

CPC classification number: H01L23/367 ,  G02B6/12 ,  G02B6/122 ,  G02B6/4269 ,  G02B6/4272 ,  G02B6/43 ,  G02B2006/12147 ,  G06F17/5022 ,  G06F17/5068 ,  G06F17/5077 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: A computer program product or hardware description language (“HDL”) design structure in a computer-aided design system for generating a functional design model of an integrated circuitry structure including generating a functional representation of at least first and second regions of the integrated circuitry structure, generating a functional representation of an optical layer comprising optical waveguides, and generating a functional representation of a heat-conductive material for transferring heat from at least the second region through the optical layer to a heat sink.

Abstract translation: 一种用于产生集成电路结构的功能设计模型的计算机辅助设计系统中的计算机程序产品或硬件描述语言（“HDL”）设计结构，包括生成集成电路结构的至少第一和第二区域的功能性表示 产生包括光波导的光学层的功能表示，以及产生用于将热量从至少第二区域通过光学层传递到散热器的导热材料的功能表示。