公开(公告)号：US20160379986A1

公开(公告)日：2016-12-29

申请号：US15160482

申请日：2016-05-20

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Josephine B. Chang ,  Leland Chang ,  Michael A. Guillorn ,  Wilfried E. Haensch

IPC: H01L27/108 ,  H01L27/12

CPC classification number: H01L27/10867 ,  H01L21/845 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/10829 ,  H01L27/10861 ,  H01L27/10876 ,  H01L27/10879 ,  H01L27/1207 ,  H01L29/0673 ,  H01L29/49 ,  H01L29/66545 ,  H01L29/785

Abstract: A memory cell, an array of memory cells, and a method for fabricating a memory cell with multigate transistors such as fully depleted finFET or nano-wire transistors in embedded DRAM. The memory cell includes a trench capacitor, a non-planar transistor, and a self-aligned silicide interconnect electrically coupling the trench capacitor to the non-planar transistor.

公开(公告)号：US20170250111A1

公开(公告)日：2017-08-31

申请号：US15593496

申请日：2017-05-12

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Josephine B. Chang ,  Leland Chang ,  Michael A. Guillorn ,  Chung-Hsun Lin ,  Adam M. Pyzyna

IPC: H01L21/768 ,  H01L23/528 ,  H01L27/12 ,  H01L21/74

CPC classification number: H01L21/76879 ,  H01L21/743 ,  H01L21/76895 ,  H01L23/5286 ,  H01L23/535 ,  H01L27/1203

Abstract: An electronic device is provided. The electronic device includes a semiconductor layer, a dielectric layer disposed on the semiconductor layer, circuitry disposed on the dielectric layer that includes interconnected cells, first contact line metallization and second contact line metallization, first power metallization disposed in-plane with or above the circuitry and second power metallization disposed in a trench defined in at least the dielectric layer. The electronic device further includes insulation disposed to insulate the second power metallization from the circuitry and the first power metallization at first locations and to permit electrical communication between the second power metallization, the circuitry and the first power metallization at second locations.

公开(公告)号：US10014214B2

公开(公告)日：2018-07-03

申请号：US15593496

申请日：2017-05-12

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Josephine B. Chang ,  Leland Chang ,  Michael A. Guillorn ,  Chung-Hsun Lin ,  Adam M. Pyzyna

IPC: H01L21/4763 ,  H01L21/768 ,  H01L23/528 ,  H01L27/12 ,  H01L21/74 ,  H01L23/535

CPC classification number: H01L21/76879 ,  H01L21/743 ,  H01L21/76895 ,  H01L23/5286 ,  H01L23/535 ,  H01L27/1203

Abstract: An electronic device is provided. The electronic device includes a semiconductor layer, a dielectric layer disposed on the semiconductor layer, circuitry disposed on the dielectric layer that includes interconnected cells, first contact line metallization and second contact line metallization, first power metallization disposed in-plane with or above the circuitry and second power metallization disposed in a trench defined in at least the dielectric layer. The electronic device further includes insulation disposed to insulate the second power metallization from the circuitry and the first power metallization at first locations and to permit electrical communication between the second power metallization, the circuitry and the first power metallization at second locations.

公开(公告)号：US09716036B2

公开(公告)日：2017-07-25

申请号：US14733398

申请日：2015-06-08

Applicant: GLOBALFOUNDRIES INC.

Inventor： Josephine B. Chang ,  Leland Chang ,  Michael A. Guillorn ,  Chung-Hsun Lin ,  Adam M. Pyzyna

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/528 ,  H01L27/12

CPC classification number: H01L21/76879 ,  H01L21/743 ,  H01L21/76895 ,  H01L23/5286 ,  H01L23/535 ,  H01L27/1203

Abstract: An electronic device is provided. The electronic device includes a semiconductor layer, a dielectric layer disposed on the semiconductor layer, circuitry disposed on the dielectric layer that includes interconnected cells, first contact line metallization and second contact line metallization, first power metallization disposed in-plane with or above the circuitry and second power metallization disposed in a trench defined in at least the dielectric layer. The electronic device further includes insulation disposed to insulate the second power metallization from the circuitry and the first power metallization at first locations and to permit electrical communication between the second power metallization, the circuitry and the first power metallization at second locations.

公开(公告)号：US20160358852A1

公开(公告)日：2016-12-08

申请号：US14733398

申请日：2015-06-08

Applicant: GLOBALFOUNDRIES INC.

Inventor： Josephine B. Chang ,  Leland Chang ,  Michael A. Guillorn ,  Chung-Hsun Lin ,  Adam M. Pyzyna

IPC: H01L23/522 ,  H01L21/768

CPC classification number: H01L21/76879 ,  H01L21/743 ,  H01L21/76895 ,  H01L23/5286 ,  H01L23/535 ,  H01L27/1203

Abstract: An electronic device is provided. The electronic device includes a semiconductor layer, a dielectric layer disposed on the semiconductor layer, circuitry disposed on the dielectric layer that includes interconnected cells, first contact line metallization and second contact line metallization, first power metallization disposed in-plane with or above the circuitry and second power metallization disposed in a trench defined in at least the dielectric layer. The electronic device further includes insulation disposed to insulate the second power metallization from the circuitry and the first power metallization at first locations and to permit electrical communication between the second power metallization, the circuitry and the first power metallization at second locations.

Abstract translation: 提供电子设备。 电子器件包括半导体层，设置在半导体层上的电介质层，设置在电介质层上的电路，包括互连电池，第一接触线金属化和第二接触线金属化，第一电力金属化设置在电路内或电路之上 以及设置在至少所述介电层中限定的沟槽中的第二功率金属化。 电子设备还包括绝缘体，其设置成在第一位置处将第二功率金属化与电路和第一功率金属化绝缘，并且允许在第二位置处的第二功率金属化，电路和第一功率金属化之间的电通信。