公开(公告)号：US20140370447A1

公开(公告)日：2014-12-18

申请号：US14475967

申请日：2014-09-03

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Guoxiang NING ,  Chunyu WONG ,  Paul ACKMANN ,  Sarasvathi THANGARAJU

IPC: G03F1/26 ,  G03F7/20

CPC classification number: G03F7/20 ,  G03F1/28 ,  G03F1/42 ,  G03F1/50

Abstract: A mask is disclosed which includes a plurality of first phase shift regions disposed on a first side of the mask, and a plurality of second phase shift regions disposed on a second side of the mask. The first phase shift regions and second phase shift regions may be alternating phase shift regions in which phase shift of the first phase shift regions is out of phase, for instance by 180 degrees, from phase shift of the second phase shift regions. A method for forming the mask, and a semiconductor device fabrication method using the mask is also disclosed.

Abstract translation: 公开了一种掩模，其包括设置在掩模的第一侧上的多个第一相移区域和设置在掩模的第二侧上的多个第二相移区域。 第一相移区域和第二相移区域可以是交变相移区域，其中第一相移区域的相移与第二相移区域的相移相异，例如180度。 还公开了一种形成掩模的方法和使用该掩模的半导体器件制造方法。

公开(公告)号：US20150017803A1

公开(公告)日：2015-01-15

申请号：US13939322

申请日：2013-07-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Guoxiang NING ,  Xiang HU ,  Paul ACKMANN ,  Sarasvathi THANGARAJU

IPC: H01L21/768

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Fabrication of through-substrate via (TSV) structures is facilitated by: forming at least one stress buffer within a substrate; forming a through-substrate via contact within the substrate, wherein the through-substrate via structure and the stress buffer(s) are disposed adjacent to or in contact with each other; and where the stress buffer(s) includes a configuration or is disposed at a location relative to the through-substrate via conductor, at least in part, according to whether the TSV structure is an isolated TSV structure, a chained TSV structure, or an arrayed TSV structure, to customize stress alleviation by the stress buffer(s) about the through-substrate via conductor based, at least in part, on the type of TSV structure.

Abstract translation: 通过（TSV）结构制造贯穿衬底通过以下方式促进：在衬底内形成至少一个应力缓冲液; 通过所述衬底内的接触形成贯通衬底，其中所述贯通衬底通孔结构和所述应力缓冲器被设置为彼此相邻或接触; 并且其中所述应力缓冲器包括配置或者被布置在相对于所述贯通基板通孔导体的位置处，至少部分地根据所述TSV结构是否是隔离的TSV结构，链接的TSV结构或 至少部分地基于TSV结构的类型来定义通过基于导体的贯穿衬底的应力缓冲器的应力缓解。

公开(公告)号：US20140353843A1

公开(公告)日：2014-12-04

申请号：US13909301

申请日：2013-06-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： GuoXiang NING ,  Xiang HU ,  Sarasvathi THANGARAJU ,  Paul ACKMANN

IPC: H01L21/768 ,  H01L23/522

CPC classification number: H01L23/5226 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Circuit structures and methods of fabrication are provided with enhanced electrical connection between, for instance, a first metal level and a contact surface of a conductive structure. Enhanced electrical connection is achieved using a plurality of contact vias which are differently-sized, and disposed over and electrically coupled to the contact surface. The differently-sized contact vias include at least one center region contact via disposed over a center region of the contact surface, and at least one peripheral region contact via disposed over a peripheral region of the contact surface, where the at least one center region contact via is larger than the at least one peripheral region contact via.

Abstract translation: 电路结构和制造方法在例如第一金属水平和导电结​​构的接触表面之间提供增强的电连接。 使用多个不同尺寸的接触通孔实现增强的电连接，并且设置在接触表面上并电耦合到接触表面。 不同尺寸的接触通孔包括设置在接触表面的中心区域上的至少一个中心区域接触孔，以及设置在接触表面的周边区域上的至少一个周边区域接触孔，其中该至少一个中心区域接触 通孔大于至少一个周边区域接触通孔。

公开(公告)号：US20140162176A1

公开(公告)日：2014-06-12

申请号：US13710498

申请日：2012-12-11

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Guoxiang NING ,  Chunyu WONG ,  Paul ACKMANN ,  Sarasvathi THANGARAJU

IPC: G03F1/26

CPC classification number: G03F7/20 ,  G03F1/28 ,  G03F1/42 ,  G03F1/50

Abstract: A mask is disclosed which includes a plurality of first phase shift regions disposed on a first side of the mask, and a plurality of second phase shift regions disposed on a second side of the mask. The first phase shift regions and second phase shift regions may be alternating phase shift regions in which phase shift of the first phase shift regions is out of phase, for instance by 180 degrees, from phase shift of the second phase shift regions. A method for forming the mask, and a semiconductor device fabrication method using the mask is also disclosed.