公开(公告)号：US09663346B1

公开(公告)日：2017-05-30

申请号：US15046245

申请日：2016-02-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Bichoy Bahr ,  Zoran Krivokapic

IPC: H03B1/00 ,  H03K3/00 ,  B81B3/00 ,  H03H3/007 ,  H03H9/24 ,  H01L29/78

CPC classification number: B81B3/0021 ,  B81B2201/0271 ,  H01L29/785 ,  H03H9/2405 ,  H03H2009/02314

Abstract: A semiconductor structure includes a semiconductor substrate, fins coupled to the semiconductor substrate, FinFETs on the fins, a common gate for the FinFETs, a dielectric layer on the semiconductor substrate, the dielectric layer surrounding a cavity with the semiconductor substrate providing bottom confinement of the acoustic cavity by total internal reflection, and an interconnect structure above the FinFETs, the interconnect structure including phononic crystal(s) to confine acoustic energy in the cavity including the cavity and metal layer(s) sandwiched between two dielectric layers. The semiconductor structure may be realized, during FEOL fabrication of a FinFET, by forming a cavity on a surface of a semiconductor substrate. Then, after fabrication of the FinFET, forming an interconnect structure for the FinFET. During formation of the interconnect structure, materials of the interconnect structure are used to form a phononic crystal to confine the cavity between the phononic crystal and the semiconductor substrate.

公开(公告)号：US10002859B1

公开(公告)日：2018-06-19

申请号：US15632909

申请日：2017-06-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Bichoy Bahr ,  Zoran Krivokapic

IPC: H01L27/02 ,  H01L27/098 ,  H01L23/532

CPC classification number: H01L27/0203 ,  H01L23/53214 ,  H01L23/53228 ,  H01L27/098 ,  H01L29/785 ,  H03H9/2405 ,  H03H2009/02314

Abstract: Circuit structures including a FinFET resonant body transistor are disclosed. One circuit structure includes: a plurality of fins over a substrate and a plurality of gate structures over the plurality of fins, the plurality of gate structures including at least one voltage sensing gate and multiple driving junction gates disposed on opposing sides of the at least one voltage sensing gate; at least one phononic crystal, wherein the at least one phononic crystal is arranged to confine vibrational energy arising from electrically induced mechanical stresses in the fins disposed below the driving junction gates; and, wherein the electrically induced mechanical stresses modulate carrier mobility in the at least one voltage sensing gate to produce a current extractable by the circuit structure.

公开(公告)号：US09899363B1

公开(公告)日：2018-02-20

申请号：US15632927

申请日：2017-06-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Bichoy Bahr ,  Zoran Krivokapic

IPC: H01L27/02 ,  H01L27/098 ,  H01L23/532

CPC classification number: H01L27/0203 ,  H01L23/53214 ,  H01L23/53228 ,  H01L27/098 ,  H03H3/0072 ,  H03H9/2405 ,  H03H2009/02314

Abstract: Circuit structures including a FinFET resonant body transistor are disclosed. One circuit structure includes: a plurality of fins over a substrate and a plurality of gate structures over the plurality of fins, the plurality of gate structures comprising at least one voltage sensing gate, and at least two of the plurality of fins comprising multiple pn-junctions disposed on opposing sides of the at least one voltage sensing gate, the multiple pn-junctions being fabricated to operate as driving units; at least one phononic crystal, wherein the at least one phononic crystal is arranged to confine vibrational energy arising from electrically induced mechanical stresses in the fins comprising driving units; and, wherein the electrically induced mechanical stresses modulate carrier mobility in the at least one voltage sensing gate to produce a current extractable by the circuit structure.

公开(公告)号：US09997695B2

公开(公告)日：2018-06-12

申请号：US15458316

申请日：2017-03-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Zoran Krivokapic ,  Bichoy Bahr

IPC: H01L29/84 ,  H01L41/107 ,  H01L41/047 ,  H01L41/29 ,  H01L29/78

CPC classification number: H01L41/107 ,  H01L29/78391 ,  H01L29/84 ,  H01L41/0474 ,  H01L41/29

Abstract: Methods to utilize piezoelectric materials as a gate dielectric in RBTs in an IC device to generate and sense higher frequency signals with high Qs and resulting devices are disclosed. Embodiments include forming, on an upper surface of a semiconductor layer, RBTs comprising even multiples of sensing RBTs and driving RBTs, each RBT including a piezoelectric gate dielectric layer, a gate, and a dielectric spacer on opposite sides of the piezoelectric gate dielectric layer and gate, wherein at least one pair of sensing RBTs is directly between two groups of driving RBTs; forming metal layers, separated by interlayer dielectric layers, above the RBTs; and forming vias through a dielectric layer above the RBTs connecting the RBTs to a metal layer.

公开(公告)号：US09673376B1

公开(公告)日：2017-06-06

申请号：US15014212

申请日：2016-02-03

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Zoran Krivokapic ,  Bichoy Bahr

IPC: H01L29/84 ,  H01L41/107 ,  H01L41/29

CPC classification number: H01L41/107 ,  H01L29/78391 ,  H01L29/84 ,  H01L41/0474 ,  H01L41/29

Abstract: Methods to utilize piezoelectric materials as a gate dielectric in RBTs in an IC device to generate and sense higher frequency signals with high Qs and resulting devices are disclosed. Embodiments include forming, on an upper surface of a semiconductor layer, RBTs comprising even multiples of sensing RBTs and driving RBTs, each RBT including a piezoelectric gate dielectric layer, a gate, and a dielectric spacer on opposite sides of the piezoelectric gate dielectric layer and gate, wherein at least one pair of sensing RBTs is directly between two groups of driving RBTs; forming metal layers, separated by interlayer dielectric layers, above the RBTs; and forming vias through a dielectric layer above the RBTs connecting the RBTs to a metal layer.