公开(公告)号：US20190244911A1

公开(公告)日：2019-08-08

申请号：US15888366

申请日：2018-02-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： Somnath Ghosh ,  Eswar Ramanathan ,  Qanit Takmeel ,  Ming He ,  Jeric Sarad ,  Ashwini Chandrashekar ,  Colin Bombardier ,  Anbu Selvam KM Mahalingam ,  Keith P. Donegan ,  Prakash Periasamy

IPC: H01L23/544 ,  H01L21/68 ,  G01B11/27 ,  G01N21/552

Abstract: Embodiments of the disclosure provide a substrate structure for an integrated circuit (IC) structure, including: a first dielectric layer positioned above a semiconductor substrate; a first plurality of trenches extending at least partially into the first dielectric layer from an upper surface of the first dielectric layer; and a first metal formed within the first plurality of trenches, wherein a spatial arrangement of the first plurality of trenches causes coupling of surface plasmons in the first metal to at least one wavelength of an incident light.

公开(公告)号：US20210013095A1

公开(公告)日：2021-01-14

申请号：US16504737

申请日：2019-07-08

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xuan Anh Tran ,  Eswar Ramanathan ,  Sunil Kumar Singh ,  Suryanarayana Kalaga ,  Suresh Kumar Regonda ,  Juan Boon Tan

IPC: H01L21/768 ,  H01L23/535

Abstract: One illustrative method disclosed herein includes, among other things, selectively forming a sacrificial material on an upper surface of a top electrode of a memory cell, forming at least one layer of insulating material around the sacrificial material and removing the sacrificial material so as to form an opening in the at least one layer of insulating material, wherein the opening exposes the upper surface of the top electrode. The method also includes forming an internal sidewall spacer within the opening in the at least one layer of insulating material and forming a conductive contact structure that is conductively coupled to the upper surface of the top electrode, wherein a portion of the conductive contact structure is surrounded by the internal sidewall spacer.

公开(公告)号：US20200098976A1

公开(公告)日：2020-03-26

申请号：US16142432

申请日：2018-09-26

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Ajey P. Jacob ,  Eswar Ramanathan

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/12

Abstract: Integrated circuits with embedded memory structures, and methods for fabricating integrated circuits are provided. An exemplary method for fabricating an integrated circuit includes forming first and second conductive interconnects over a semiconductor substrate. The method includes depositing a conductive material over the first conductive interconnect. Also, the method includes forming a memory structure over the conductive material, wherein the memory structure has an uppermost surface distanced from the first conductive interconnect by a first height. Further, the method includes forming an interlayer dielectric over the memory structure and forming a conductive via coupled to the second conductive interconnect, wherein the conductive via has a second height over the second conductive interconnect less than the first height. The method also includes forming first and second contact plugs through the interlayer dielectric. The first contact plug contacts the memory structure and the second contact plug contacts the conductive via.

公开(公告)号：US10510675B2

公开(公告)日：2019-12-17

申请号：US15888366

申请日：2018-02-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： Somnath Ghosh ,  Eswar Ramanathan ,  Qanit Takmeel ,  Ming He ,  Jeric Sarad ,  Ashwini Chandrashekar ,  Colin Bombardier ,  Anbu Selvam KM Mahalingam ,  Keith P. Donegan ,  Prakash Periasamy

IPC: H01L21/00 ,  H01L23/544 ,  G01N21/552 ,  G01B11/27 ,  H01L21/68

Abstract: Embodiments of the disclosure provide a substrate structure for an integrated circuit (IC) structure, including: a first dielectric layer positioned above a semiconductor substrate; a first plurality of trenches extending at least partially into the first dielectric layer from an upper surface of the first dielectric layer; and a first metal formed within the first plurality of trenches, wherein a spatial arrangement of the first plurality of trenches causes coupling of surface plasmons in the first metal to at least one wavelength of an incident light.