DENSELY PACKED STANDARD CELLS FOR INTEGRATED CIRCUIT PRODUCTS, AND METHODS OF MAKING SAME
    1.
    发明申请
    DENSELY PACKED STANDARD CELLS FOR INTEGRATED CIRCUIT PRODUCTS, AND METHODS OF MAKING SAME 审中-公开
    用于集成电路产品的密封包装标准电池及其制造方法

    公开(公告)号:US20150108583A1

    公开(公告)日:2015-04-23

    申请号:US14579628

    申请日:2014-12-22

    Abstract: One method disclosed herein includes forming first and second transistor devices in and above adjacent active regions that are separated by an isolation region, wherein the transistors comprise a source/drain region and a shared gate structure, forming a continuous conductive line that spans across the isolation region and contacts the source/drain regions of the transistors and etching the continuous conductive line to form separated first and second unitary conductive source/drain contact structures that contact the source/drain regions of the first and second transistors, respectively. A device disclosed herein includes a gate structure, source/drain regions, first and second unitary conductive source/drain contact structures, each of which contacts one of the source/drain regions, and first and second conductive vias that contact the first and second unitary conductive source/drain contact structures, respectively

    Abstract translation: 本文公开的一种方法包括在由隔离区域分隔的相邻有源区域中和上方形成第一和第二晶体管器件,其中晶体管包括源极/漏极区域和共享栅极结构,形成跨越隔离的连续导电线 区域并与晶体管的源极/漏极区域接触并蚀刻连续导电线以形成分别与第一和第二晶体管的源极/漏极区域接触的分离的第一和第二整体导电源极/漏极接触结构。 本文公开的器件包括栅极结构,源极/漏极区域,第一和第二整体导电源极/漏极接触结构,其每一个接触源极/漏极区域之一,以及接触第一和第二整体的第一和第二导电通孔 导电源极/漏极接触结构

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