PRINTING MINIMUM WIDTH FEATURES AT NON-MINIMUM PITCH AND RESULTING DEVICE
    1.
    发明申请
    PRINTING MINIMUM WIDTH FEATURES AT NON-MINIMUM PITCH AND RESULTING DEVICE 有权
    打印非最小平板和结果设备的最小宽度特征

    公开(公告)号:US20150130026A1

    公开(公告)日:2015-05-14

    申请号:US14074981

    申请日:2013-11-08

    Abstract: Methods for forming a semiconductor layer, such as a metal1 layer, having minimum width features separated by a distance greater than a minimum pitch, and the resulting devices are disclosed. Embodiments may include determining a first shape and a second shape having a minimum width within a semiconductor layer, wherein a distance between the first shape and the second shape is greater than a minimum pitch, determining an intervening shape between the first shape and the second shape, and designating a dummy shape within the intervening shape, wherein the dummy shape is at the minimum pitch from the first shape.

    Abstract translation: 公开了形成半导体层的方法,例如金属层,其具有最小宽度特征被隔开大于最小间距的距离,以及所得到的器件。 实施例可以包括确定在半导体层内具有最小宽度的第一形状和第二形状,其中第一形状和第二形状之间的距离大于最小间距,确定第一形状和第二形状之间的中间形状 并且在所述中间形状中指定虚拟形状,其中所述虚拟形状距所述第一形状处于最小间距。

    PRINTING MINIMUM WIDTH FEATURES AT NON-MINIMUM PITCH AND RESULTING DEVICE
    2.
    发明申请
    PRINTING MINIMUM WIDTH FEATURES AT NON-MINIMUM PITCH AND RESULTING DEVICE 有权
    打印非最小平板和结果设备的最小宽度特征

    公开(公告)号:US20160093565A1

    公开(公告)日:2016-03-31

    申请号:US14953864

    申请日:2015-11-30

    Abstract: Methods for forming a semiconductor layer, such as a metal 1 layer, having minimum width features separated by a distance greater than a minimum pitch, and the resulting devices are disclosed. Embodiments may include determining a first shape and a second shape having a minimum width within a semiconductor layer, wherein a distance between the first shape and the second shape is greater than a minimum pitch, determining an intervening shape between the first shape and the second shape, and designating a dummy shape within the intervening shape, wherein the dummy shape is at the minimum pitch from the first shape.

    Abstract translation: 公开了形成半导体层的方法,例如金属1层,其具有最小宽度特征被分开大于最小间距的距离,以及所得到的器件。 实施例可以包括确定在半导体层内具有最小宽度的第一形状和第二形状,其中第一形状和第二形状之间的距离大于最小间距,确定第一形状和第二形状之间的中间形状 并且在所述中间形状中指定虚拟形状,其中所述虚拟形状距所述第一形状处于最小间距。

    POWER RAIL LAYOUT FOR DENSE STANDARD CELL LIBRARY
    4.
    发明申请
    POWER RAIL LAYOUT FOR DENSE STANDARD CELL LIBRARY 有权
    电力轨道布局用于密封标准单元库

    公开(公告)号:US20150052494A1

    公开(公告)日:2015-02-19

    申请号:US13968850

    申请日:2013-08-16

    CPC classification number: G06F17/5077 G06F2217/06 G06F2217/78

    Abstract: A method includes electrically connecting a plurality of cells of a standard cell library to a power rail. A contact area is deposited to connect a first active area and a second active area of a cell of a plurality cells. The first area and the second area are located on opposite sides of the rail and electrically connected to different drains. The contact area is electrically connected to the power rail using a via. The contact area is masked to remove a portion of the contact area to electrically separate the first active are from the second active area.

    Abstract translation: 一种方法包括将标准单元库的多个单元电连接到电源轨。 沉积接触区以连接多个单元的单元的第一有源区和第二有源区。 第一区域和第二区域位于轨道的相对侧并且电连接到不同的排水沟。 接触区域使用通孔电连接到电源轨。 接触区域被屏蔽以去除接触区域的一部分以将第一活性物质与第二活性区域电分离。

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