FORMING A LOW VOTAGE ANTIFUSE DEVICE AND RESULTING DEVICE
    1.
    发明申请
    FORMING A LOW VOTAGE ANTIFUSE DEVICE AND RESULTING DEVICE 有权
    形成低电平抗体设备和结果设备

    公开(公告)号:US20150137258A1

    公开(公告)日:2015-05-21

    申请号:US14082263

    申请日:2013-11-18

    Abstract: Methods for a low voltage antifuse device and the resulting devices are disclosed. Embodiments may include forming a plurality of fins above a substrate, removing a portion of a fin, forming a fin tip, forming a first area of a gate oxide layer above at least the fin tip, forming a second area of the gate oxide layer above a remaining portion of the plurality of fins, wherein the first area is thinner than the second area, and forming a gate over at least the fin tip to form an antifuse one-time programmable device.

    Abstract translation: 公开了低压反熔丝装置的方法和所得装置。 实施例可以包括在基板上形成多个翅片,去除鳍片的一部分,形成翅片尖端,在至少鳍片尖端上形成栅极氧化物层的第一区域,形成上面的栅极氧化物层的第二区域 所述多个翅片的剩余部分,其中所述第一区域比所述第二区域薄,并且在至少所述翅片末端上形成栅极以形成反熔丝一次性可编程装置。

    POWER RAIL LAYOUT FOR DENSE STANDARD CELL LIBRARY
    2.
    发明申请
    POWER RAIL LAYOUT FOR DENSE STANDARD CELL LIBRARY 有权
    电力轨道布局用于密封标准单元库

    公开(公告)号:US20150052494A1

    公开(公告)日:2015-02-19

    申请号:US13968850

    申请日:2013-08-16

    CPC classification number: G06F17/5077 G06F2217/06 G06F2217/78

    Abstract: A method includes electrically connecting a plurality of cells of a standard cell library to a power rail. A contact area is deposited to connect a first active area and a second active area of a cell of a plurality cells. The first area and the second area are located on opposite sides of the rail and electrically connected to different drains. The contact area is electrically connected to the power rail using a via. The contact area is masked to remove a portion of the contact area to electrically separate the first active are from the second active area.

    Abstract translation: 一种方法包括将标准单元库的多个单元电连接到电源轨。 沉积接触区以连接多个单元的单元的第一有源区和第二有源区。 第一区域和第二区域位于轨道的相对侧并且电连接到不同的排水沟。 接触区域使用通孔电连接到电源轨。 接触区域被屏蔽以去除接触区域的一部分以将第一活性物质与第二活性区域电分离。

    FORMING FINFET CELL WITH FIN TIP AND RESULTING DEVICE
    3.
    发明申请
    FORMING FINFET CELL WITH FIN TIP AND RESULTING DEVICE 有权
    用FIN提示和结果设备形成FINFET电池

    公开(公告)号:US20150137203A1

    公开(公告)日:2015-05-21

    申请号:US14081736

    申请日:2013-11-15

    Abstract: Methods for forming a variable fin FinFET cell that can withstand a larger voltage without gate oxide breakdown at a fin tip and the resulting devices are disclosed. A plurality of fins is formed above a substrate, a portion of a fin is removed, forming a fin tip, a first area of a gate oxide layer is formed above the fin tip, and a second area of the gate oxide layer is formed above at least a remaining portion of the plurality of fins, wherein the first area is thicker than the second area.

    Abstract translation: 公开了用于形成能够承受较大电压而不会在翅片尖端处产生栅极氧化物击穿的可变鳍FinFET电池的方法和所得到的器件。 在基板的上方形成有多个翅片,去除翅片的一部分,形成翅片末端,在翅片顶部的上方形成栅极氧化物层的第一区域,并且在上部形成栅极氧化物层的第二区域 所述多个翅片的至少剩余部分,其中所述第一区域比所述第二区域厚。

    CONTACT POWER RAIL
    4.
    发明申请
    CONTACT POWER RAIL 有权
    联系电力铁

    公开(公告)号:US20150035052A1

    公开(公告)日:2015-02-05

    申请号:US14519902

    申请日:2014-10-21

    Abstract: A method for forming CA power rails using a three mask decomposition process and the resulting device are provided. Embodiments include forming a horizontal diffusion CA power rail in an active layer of a semiconductor substrate using a first color mask; forming a plurality of vertical CAs in the active layer using second and third color masks, the vertical CAs connecting the CA power rail to at least one diffusion region on the semiconductor substrate, spaced from the CA power rail, wherein each pair of CAs formed by one of the second and third color masks are separated by at least two pitches.

    Abstract translation: 提供了使用三掩模分解处理形成CA电力轨道的方法和所得到的装置。 实施例包括使用第一颜色掩模在半导体衬底的有源层中形成水平扩散CA电力轨道; 使用第二和第三颜色掩模在有源层中形成多个垂直CA,垂直CA将CA电力轨连接到半导体衬底上与CA电力轨道间隔开的至少一个扩散区,其中每对CA由 第二和第三彩色掩模中的一个被至少两个间距分开。

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