公开(公告)号：US20220115329A1

公开(公告)日：2022-04-14

申请号：US17070377

申请日：2020-10-14

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Johnatan A. KANTAROVSKY ,  Vibhor JAIN ,  Siva P. ADUSUMILLI ,  Ajay RAMAN ,  Sebastian T. VENTRONE ,  Yves T. NGU

IPC: H01L23/552 ,  H01L23/00 ,  H01L49/02 ,  H01L23/522

Abstract: The present disclosure relates to integrated circuits, and more particularly, to an anti-tamper x-ray blocking package for secure integrated circuits and methods of manufacture and operation. In particular, the present disclosure relates to a structure including: one or more devices on a front side of a semiconductor material; a plurality of patterned metal layers under the one or more devices, located and structured to protect the one or more devices from an active intrusion; an insulator layer between the plurality of patterned metal layers; and at least one contact providing an electrical connection through the semiconductor material to a front side of the plurality of metals.

公开(公告)号：US20210335731A1

公开(公告)日：2021-10-28

申请号：US16855185

申请日：2020-04-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Vibhor JAIN ,  Ajay RAMAN ,  Sebastian T. VENTRONE ,  John J. ELLIS-MONAGHAN ,  Siva P. ADUSUMILLI ,  Yves T. NGU

IPC: H01L23/00

Abstract: The present disclosure relates to an active x-ray attack prevention structure for secure integrated circuits. In particular, the present disclosure relates to a structure including a functional circuit, and at least one latchup sensitive diode circuit configured to induce a latchup condition in the functional circuit, placed in proximity of the functional circuit.

公开(公告)号：US20240250157A1

公开(公告)日：2024-07-25

申请号：US18099366

申请日：2023-01-20

Applicant: GlobalFoundries U.S. Inc.

Inventor： Uppili S. RAGHUNATHAN ,  Vibhor JAIN ,  Yves T. NGU ,  Johnatan A. KANTAROVSKY ,  Sebastian T. VENTRONE

IPC: H01L29/73 ,  H01L23/34 ,  H01L27/07 ,  H01L29/06 ,  H01L29/08 ,  H01L29/737

CPC classification number: H01L29/7302 ,  H01L23/345 ,  H01L27/075 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heater terminal contacts, methods of operation and methods of manufacture. The structure includes: a heterojunction bipolar transistor having a collector, sub-collector region, emitter and base region; and heater terminal contacts electrically coupled to the sub-collector region.

公开(公告)号：US20240249992A1

公开(公告)日：2024-07-25

申请号：US18099389

申请日：2023-01-20

Applicant: GlobalFoundries U.S. Inc.

Inventor： Uppili S. RAGHUNATHAN ,  Vibhor JAIN ,  Yves T. NGU ,  Johnatan A. KANTAROVSKY ,  Sebastian T. VENTRONE

IPC: H01L23/34 ,  H01L29/737

CPC classification number: H01L23/345 ,  H01L29/7371

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heater elements, methods of operation and methods of manufacture. The structure includes: an active device; a heater element under the active device and within a semiconductor substrate; and a contact to the heater element and the active device.

公开(公告)号：US20230317627A1

公开(公告)日：2023-10-05

申请号：US17707273

申请日：2022-03-29

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Uppili S. RAGHUNATHAN ,  Vibhor JAIN ,  Siva P. ADUSUMILLI ,  Yves T. NGU ,  Johnatan A. KANTAROVSKY ,  Sebastian T. VENTRONE

IPC: H01L23/552 ,  H01L29/737 ,  H01L29/06 ,  H01L21/764

CPC classification number: H01L23/552 ,  H01L29/7371 ,  H01L29/0649 ,  H01L21/764

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to devices with airgap structures and methods of manufacture. The structure includes: a semiconductor substrate with a trap-rich region; one or more airgap structures within the semiconductor substrate; at least one deep trench isolation structure laterally surrounding the one or more airgap structures and extending into the semiconductor substrate; and a device over the one or more airgap structures.

公开(公告)号：US20220320015A1

公开(公告)日：2022-10-06

申请号：US17223596

申请日：2021-04-06

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor JAIN ,  Yusheng BIAN ,  Yves T. NGU ,  Sunil K. SINGH ,  Sebastian T. VENTRONE ,  Johnatan A. KANTAROVSKY

IPC: H01L23/00

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a backside structure for optical attack mitigation and methods of manufacture. The structure includes: at least one device on a front side of a semiconductor substrate; and a plurality of grating layers under the at least one device. The plurality of grating layers includes at least a first material having a first refractive index alternating with a second material having a second refractive index.