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公开(公告)号:US11349304B2
公开(公告)日:2022-05-31
申请号:US17082182
申请日:2020-10-28
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Alain F. Loiseau , Robert J. Gauthier, Jr. , Souvick Mitra , You Li , Meng Miao , Wei Liang
Abstract: Embodiments of the disclosure provide a circuit structure and method to control electrostatic discharge (ESD) events in a resistor-capacitor (RC) circuit. Circuit structures according to the disclosure may include a trigger transistor coupled in parallel with the RC circuit, and a gate terminal coupled to part of the RC circuit. A mirror transistor coupled in parallel with the RC circuit transmits a current that is less than a current through the trigger transistor. A snapback device has a gate terminal coupled to a source or drain of the mirror transistor, and a pair of anode/cathode terminals coupled in parallel with the RC circuit. A current at the gate terminal of the snapback device, derived from current in the mirror transistor, controls an anode/cathode current flow in the snapback device.
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公开(公告)号:US11335674B2
公开(公告)日:2022-05-17
申请号:US16455071
申请日:2019-06-27
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Souvick Mitra , Robert J. Gauthier, Jr. , Alain F. Loiseau , You Li , Tsung-Che Tsai
IPC: H01L27/02
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to diode triggered Silicon controlled rectifiers and methods of manufacture. The structure includes a diode string comprising a first type of diodes and a second type of diode in bulk technology in series with the diode string of the first type of diodes.
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公开(公告)号:US11171132B2
公开(公告)日:2021-11-09
申请号:US16592013
申请日:2019-10-03
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Souvick Mitra , Alain F. Loiseau , Robert J. Gauthier, Jr. , You Li , Tsung-Che Tsai
IPC: H01L27/02 , H01L29/06 , H01L29/747 , H01L29/66
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to bi-directional silicon controlled rectifiers (SCRs) and methods of manufacture. The structure includes: a plurality of diffusion regions; a plurality of p-type (P+) wells adjacent to the diffusion regions, wherein the P+ wells are directly connected; and a plurality of n-type (N+) wells adjacent to the P+ wells.
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公开(公告)号:US12107083B2
公开(公告)日:2024-10-01
申请号:US18462779
申请日:2023-09-07
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Robert J. Gauthier, Jr. , Meng Miao , Alain F. Loiseau , Souvick Mitra , You Li , Wei Liang
IPC: H01L27/02 , H01L21/8222 , H01L21/84 , H01L27/12
CPC classification number: H01L27/0259 , H01L21/8222 , H01L21/84 , H01L27/0288 , H01L27/1207
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to electrostatic discharge (ESD) devices and methods of manufacture. The structure (ESD device) includes: a bipolar transistor comprising a collector region, an emitter region and a base region; and a lateral ballasting resistance comprising semiconductor material adjacent to the collector region.
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公开(公告)号:US11791626B2
公开(公告)日:2023-10-17
申请号:US17490371
申请日:2021-09-30
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: You Li , Alain F. Loiseau , Souvick Mitra , Tsung-Che Tsai , Mickey Yu , Robert J. Gauthier, Jr.
CPC classification number: H02H9/046 , H01L23/60 , H01L27/0255 , H01L27/0262 , H01L27/0288 , H01L27/0292 , H02H1/0007
Abstract: A circuit structure includes: a network of clamps; sense elements in series with the clamps and configured to sense a turn-on of at least one clamp of the network of clamps; and feedback elements connected to the clamps to facilitate triggering of remaining clamps of the network of clamps.
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公开(公告)号:US20220131369A1
公开(公告)日:2022-04-28
申请号:US17082182
申请日:2020-10-28
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Alain F. Loiseau , Robert J. Gauthier, JR. , Souvick Mitra , You Li , Meng Miao , Wei Liang
Abstract: Embodiments of the disclosure provide a circuit structure and method to control electrostatic discharge (ESD) events in a resistor-capacitor (RC) circuit. Circuit structures according to the disclosure may include a trigger transistor coupled in parallel with the RC circuit, and a gate terminal coupled to part of the RC circuit. A mirror transistor coupled in parallel with the RC circuit transmits a current that is less than a current through the trigger transistor. A snapback device has a gate terminal coupled to a source or drain of the mirror transistor, and a pair of anode/cathode terminals coupled in parallel with the RC circuit. A current at the gate terminal of the snapback device, derived from current in the mirror transistor, controls an anode/cathode current flow in the snapback device.
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7.
公开(公告)号:US20220037309A1
公开(公告)日:2022-02-03
申请号:US16983071
申请日:2020-08-03
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Robert J. Gauthier, JR. , Alain F. Loiseau , Souvick Mitra , Tsung-Che Tsai , Meng Miao , You Li
IPC: H01L27/02
Abstract: Embodiments of the disclosure provide an integrated circuit (IC) structure, including a doped well in a semiconductor substrate, in addition to a base region, emitter region, and collector region in the doped well. An insulative material is within the doped well, with a first end horizontally adjacent the collector region and a second end opposite the first end. A doped semiconductor region is within the doped well adjacent the second end of the insulative material. The doped semiconductor region is positioned to define an avalanche junction between the collector region and the doped semiconductor region across the doped well.
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公开(公告)号:US11631759B2
公开(公告)日:2023-04-18
申请号:US17164855
申请日:2021-02-02
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Meng Miao , Alain François Loiseau , Souvick Mitra , Robert John Gauthier, Jr. , You Li , Wei Liang
Abstract: An ESD protection device may be provided, including: a substrate including a first conductivity region and a second conductivity region arranged therein. The first conductivity region may include a first terminal region and a second terminal region electrically coupled with each other. The second conductivity region may include a third terminal region and a fourth terminal region electrically coupled with each other. The second conductivity region may further include a fifth terminal region electrically coupled with the first and second terminal regions. The fifth terminal region may be arranged laterally between the third terminal region and the fourth terminal region. The first conductivity region, the first terminal region, the third terminal region, and the fifth terminal region may have a first conductivity type. The second conductivity region, the second terminal region, and the fourth terminal region may have a second conductivity type different from the first conductivity type.
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公开(公告)号:US11804481B2
公开(公告)日:2023-10-31
申请号:US17185243
申请日:2021-02-25
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Robert J. Gauthier, Jr. , Meng Miao , Alain F. Loiseau , Souvick Mitra , You Li , Wei Liang
IPC: H01L27/02 , H01L21/84 , H01L21/8222 , H01L27/12
CPC classification number: H01L27/0259 , H01L21/8222 , H01L21/84 , H01L27/0288 , H01L27/1207
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to electrostatic discharge (ESD) devices and methods of manufacture. The structure (ESD device) includes: a bipolar transistor comprising a collector region, an emitter region and a base region; and a lateral ballasting resistance comprising semiconductor material adjacent to the collector region.
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公开(公告)号:US11769767B2
公开(公告)日:2023-09-26
申请号:US17704422
申请日:2022-03-25
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Souvick Mitra , Robert J. Gauthier, Jr. , Alain F. Loiseau , You Li , Tsung-Che Tsai
IPC: H01L27/02
CPC classification number: H01L27/0255 , H01L27/0262
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to diode triggered Silicon controlled rectifiers and methods of manufacture. The structure includes a diode string comprising a first type of diodes and a second type of diode in bulk technology in series with the diode string of the first type of diodes.
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